VP386PAG8 IDT, Integrated Device Technology Inc, VP386PAG8 Datasheet
VP386PAG8
Specifications of VP386PAG8
Related parts for VP386PAG8
VP386PAG8 Summary of contents
Page 1
LVDS RECEIVER FOR VIDEO General Description The VP386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.8 Gbps throughput or 350 Mbytes per second. This ...
Page 2
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Pin Assignment 8/28-BIT LVDS RECEIVER FOR VIDEO RxOUT22 1 56 RxOUT23 2 55 RxOUT24 3 54 GND RxOUT25 6 51 RxOUT26 RxOUT27 LVDS_GND 9 48 RxIN0- ...
Page 3
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Pin Descriptions Pin No. Pin Name 1 RxOUT22 2 RxOUT23 3 RxOUT24 4 GND 5 RxOUT25 6 RxOUT26 7 RxOUT27 8 LVDS_GND 9 RxIN0- 10 RxIN0+ 11 RxIN1- 12 RxIN1+ 13 LVDS_VCC 14 LVDS_GND ...
Page 4
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Pin No. Pin Name 35 RxOUT6 36 GND 37 RxOUT7 38 RxOUT8 39 RxOUT9 40 VCC 41 RxOUT10 42 RxOUT11 43 RxOUT12 44 GND 45 RxOUT13 46 RxOUT14 47 RxOUT15 48 VCC 49 RxOUT16 ...
Page 5
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Absolute Maximum Ratings Item Supply Voltage, VCC CMOS/TTL Output Voltage LVDS Receiver Input Voltage Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature (10 seconds max.) Maximum Package Power Package Derating 1. Stresses greater ...
Page 6
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Electrical Characteristics VDD=3.3 V ±10%, Ambient temperature Parameter CMOS/TTL DC Specifications Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Clamp Voltage Input Current Output Short ...
Page 7
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Parameter RCK+/- to CLKOUT Delay Receiver PLL Setup Time Receiver Power Down Delay Receiver Input Strobe Position for Bit0 Receiver Input Strobe Position for Bit1 Receiver Input Strobe Position for Bit2 Receiver Input Strobe ...
Page 8
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Timing Diagrams CLKIN/CLKOUT ODD Data In/Data Out EVEN Data In/Data Out CLKOUT D0 D1 D2, 10, 18 D3, 11, 19 D4-7, 12-15, 20-23 D24-27 CMOS/TTL Output 8 pF Figure 3. ...
Page 9
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO RCK CLKOUT PWRDWN VCC RCK CLKOUT 8/28-BIT LVDS RECEIVER FOR VIDEO Vdiff=0V RCOP Figure 5. VP386 Clock In to Clock Out Delay 2.0 V 3.0 V RPLLS Figure 6. VP386 Phase Lock Loop Set ...
Page 10
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO ClocK Previous Cycle Data Rspos0 Min Rspos0 Max Rspos1 Min Rspos1 Max Rspos2 Min Rspos2 Max RCK+/RCK- RX[n]+/RX[n 8/28-BIT LVDS RECEIVER FOR VIDEO Next Cycle Rspos3 Min Rspos3 ...
Page 11
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No INDEX AREA SYMBOL ...
Page 12
IDTVP386 8/28-BIT LVDS RECEIVER FOR VIDEO Ordering Information IDTVP XXXX XX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 © 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without ...