ADRF6602ACPZ-R7 Analog Devices Inc, ADRF6602ACPZ-R7 Datasheet - Page 19

• Manufacturer Part Number: ADRF6602ACPZ-R7
• Manufacturer: Analog Devices Inc

Specifications of ADRF6602ACPZ-R7

• Lead Free Status / Rohs Status: Compliant

REGISTER 5—PLL ENABLE AND LO PATH CONTROL (DEFAULT: 0x0000E5)
REGISTER 6—VCO CONTROL AND VCO ENABLE (DEFAULT: 0x1E2106)
REGISTER 7—MIXER BIAS ENABLE AND EXTERNAL VCO ENABLE (DEFAULT: 0x000007)
DB23
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8
CPEN
0
1
0
0
RESERVED
DB22 DB21
CHARGE PUMP ENABLE
DISABLE
ENABLE (DEFAULT)
0
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
RES
L3EN 3.3V LDO ENABLE
0
1
0
0
0
LVEN
0
1
XVCO
XVCO
XVCO
0
1
DISABLE
ENABLE (DEFAULT)
CHARGE
ENABLE
PUMP
CPEN
DB20
0
MIXER
MBE
0
1
B_EN
VCO LDO ENABLE
DISABLE
ENABLE (DEFAULT)
MBE
EXTERNAL VCO
INTERNAL VCO (DEFAULT)
EXTERNAL VCO
0
ENABLE
MIXER BIAS ENABLE
DISABLE
ENABLE (DEFAULT)
DB19
L3EN
3.3V
LDO
0
RESERVED
0
VCO LDO
0
ENABLE
0
DB18
LVEN
Figure 45. Register 7—Mixer Bias Enable and External VCO Enable Register Map
0
0
Figure 43. Register 5—PLL Enable and LO Path Control Register Map
CD3
0
1
ENABLE
VCO EN VCO SW VC5 VC4 VC3 VC2 VC1 VC0
VCO EN
0
1
Figure 44. Register 6—VCO Control and VCO Enable Register Map
DB17
VCO
0
0
CD2
0
1
0
VCO SW
0
1
SWITCH
0
VCO ENABLE
DISABLE
ENABLE (DEFAULT)
DB16
VCO
0
CD1
0
1
0
DB15 DB14 DB13 DB12 DB11 DB10
VCO SWITCH CONTROL FROM SPI
REGULAR (DEFAULT)
BAND CAL
0
CD0
0
1
0
VC[5:0] VCO AMPLITUDE
0x00
….
0x18
….
0x2B
….
0x3F
Rev. C | Page 19 of 32
0
CAPACITOR DAC
CONTROL FOR IIP3
OPTIMIZATION
MIN
MAX
VCO AMPLITUDE
CD3 CD2 CD1 CD0
RESERVED
0
0
….
24 (DEFAULT)
….
43
….
63 (RECOMMENDED)
CAP DAC
0
0
0
RES
DB7
0
BW SW
VBSRC VBS5 VBS4 VBS3 VBS2 VBS1 VBS0 C3(1) C2(1) C1(0)
0
CTRL
VCO
DB9
VBSRC
0
1
PLEN
0
1
PLEN
DB6
PLL
EN
0
DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
VCO BW CAL AND SW SOURCE CONTROL
BAND CAL (DEFAULT)
SPI
PLL ENABLE
DISABLE
ENABLE (DEFAULT)
VCO BAND SELECT FROM SPI
LDV1
LDV1
0
1
DIV1
DB5
VBS[5:0]
0x00
0x01
….
0x3F
0
LO
0
LXL
0
1
DIVIDE-BY-2 IN LO CHAIN ENABLE
DIVIDE BY 1
DIVIDE BY 2 (DEFAULT)
LXL
EXT
DB4
LO
VCO BAND SELECT FROM SPI
DEFAULT 0x20
0
EXTERNAL LO DRIVE
ENABLE (PIN 37, PIN 38)
INTERNAL LO OUTPUT (DEFAULT)
EXTERNAL LO INPUT
LDRV C3(1) C2(0) C1(1)
LDRV
0
1
DRV
DB3
LO
0
C3(1) C2(1) C1(1)
DB2 DB1 DB0
LO OUTPUT DRIVER
ENABLE
DRIVER OFF (DEFAULT)
DRIVER ON
CONTROL BITS
CONTROL BITS
CONTROL BITS
ADRF6602