TA1318N TOSHIBA Semiconductor CORPORATION, TA1318N Datasheet
TA1318N
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TA1318N Summary of contents
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... TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic SYNC Processor, Frequency Counter IC for TV Component Signals TA1318N is a sync processor for TV component signals. TA1318N provides sync and frequency counter processing for external input signals. These functions are integrated pin dual-in-line shrink-type plastic package. ...
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... SEPA DAC1 V-Input SW Clamp Pulse V HD Integral Polarity H-INPUT H-AFC SW HVCO VD1-IN Analog GND AFC Filter HVCO 2 SCL SDA HD2-OUT Digital GND CBUS INV Decoder SW HD2-OUT SW V-FREQ V C C/D H-Ramp H-FREQ DAC2 VD3-IN HD3-IN CC TA1318N HD1-OUT 13 INV SW HD1-OUT SW 12 CP-OUT 2003-02-19 ...
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... Input signal from this pin is not synchronized. Inputs vertical sync signal. Accepts input of both positive 2 VD2-IN and negative polarity. Input signal from this pin is not synchronized. Interface Circuit TA1318N Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... Input signal from this pin is not synchronized. Inputs vertical sync signal. Accepts input of both positive 4 VD1-IN and negative polarity. Input signal from this pin is not synchronized. GND pin for analog circuit 5 Analog GND blocks. Interface Circuit TA1318N Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... Pin Pin Name Function No. Connects filter for horizontal AFC. 6 AFC Filter Voltage on this pin determines horizontal output frequency. Connects ceramic oscillator for horizontal oscillation. 7 HVCO Use Murata CSBLA503KECZF30. VCC pin Connects 9 V (typ.). Interface Circuit 8 300 TA1318N Input Signal/Output Signal DC 2003-02-19 ...
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... Inputs vertical sync signal. 10 VD3-IN Accepts input of both positive and negative polarity. Inputs horizontal sync signal. 11 HD3-IN Accepts input of both positive and negative polarity. Interface Circuit 8 200 TA1318N Input Signal/Output Signal DC or H/C SYNC Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... CP-OUT Outputs CP generated by sync circuit. HD output pin. Open collector output. HD1/HD2 input signal is output 13 HD1-OUT from this pin without synchronization. Polarity is switched by BUS write function. 14 Digital GND GND pin for logic blocks. Interface Circuit 8 200 200 TA1318N Input Signal/Output Signal 5 2003-02-19 ...
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... Pin Pin Name Function No. HD output pin. Open collector output. HD1/HD2 input signal is output 15 HD2-OUT from this pin without synchronization. Polarity is switched by BUS write function SDA SDA pin for I C bus. Interface Circuit 8 200 SDA 16 ACK 8 TA1318N Input Signal/Output Signal 2003-02-19 ...
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... SCL pin for I C bus. Slave address switch pin. When this pin is connected to 18 Address SW V (GND), used for DC/DD CC (D8/D9 ); when left open, H DA/ Interface Circuit 20 k SCL Input Signal/Output Signal DC/DD 7.5 V DA/DB 1.5 V D8/D9 5 TA1318N 9 V 7 2003-02-19 ...
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... NTSC (525I/60 Hz), PAL/SECAM (625I/50 Hz), NTSC Double Scan (525I/120 Hz), PAL/SECAM Double Scan (625I/100 Hz), 525P/60 Hz, 750P/60 Hz, 1125I/60 Hz, 1125P/30 Hz This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit 200 TA1318N Input Signal/Output Signal White 100Ñ SYNC 2003-02-19 ...
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... NTSC (525I/60 Hz), PAL/SECAM (625I/50 Hz), NTSC Double Scan (525I/120 Hz), PAL/SECAM Double Scan (625I/100 Hz), 525P/60 Hz, 750P/60 Hz, 1125I/60 Hz, 1125P/30 Hz This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit 200 TA1318N Input Signal/Output Signal White 100Ñ Start phase or Start phase 2003-02-19 ...
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... VD width will change. Use the start phase of VD. DAC3 output pin. Open collector output. 24 DAC3 In Test mode, outputs test pulse for shipping. Interface Circuit 8 200 500 TA1318N Input Signal/Output Signal Start phase or Start phase DC or test pulse for shipping 2003-02-19 ...
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... FREQUENCY DET H FREQUENCY DET *(10): 33.75 kHz (11): 45 kHz (10): HD3/VD3 (11): Synchronized HD/VD (10): HD3/VD3 (11): Synchronized HD/VD (10): 20IRE (11): 25IRE (at 1125I/60) *(10 (11 (10 (11 (1): ON (LOW) 13 TA1318N D0 Preset D1 LSB MSB LSB SEPA LEVEL 1000 0000 HD1-INV HD2-INV 1000 0000 INPUT SW 1000 0000 VD1-INV VD2-INV 1000 0000 ...
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... Hz (45 kHz) Free-running frequency is controlled by H-FREQUENCY. (00): 262 H (01): 525 H (10): 562 H (11): 750 H 1125I/60 Hz (33.75 kHz) 525P/60 Hz (31.5 kHz) PAL/SECAM/50 Hz (15.625 kHz) PAL/SECAM double scan/100 Hz (31.5 kHz) NTSC/60 Hz (15.734 kHz) NTSC double scan /120 Hz (31.5 kHz) VD output is HIGH 14 TA1318N 2003-02-19 ...
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... Note 1, Note 2 and the other factors such as signal strength, existence of ghost signal, 2 H-AFC stability BUS data transmission and so on via prototype TV set evaluation. 476.2 s 474 [Hz [kHz] Data 1 and Start trigger 2 More than 60 ms Counting period 2 (to Data 2) 15 TA1318N 1 s). Data 2 and Start trigger 3 2003-02-19 ...
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... Start and Stop Condition SDA SCL S Start condition Bit Transfer SDA SCL Acknowledge SDA by transmitter SDA by receiver SCL from master 0/1 P Stop condition SDA stable Change of SDA allowed Bit 9: High impedance Clock pulse for acknowledgment 16 TA1318N A0 W/R 0/1 0/1 Only bit 9: Low impedance 2003-02-19 ...
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... Philips. A Transmit data bit 8 bit MSB P: Stop condition A Transmit data A ////// Sub address A Transmit data n A Received data bit Sub address A Transmit data 1 //// 7 bit 8 bit MSB 17 TA1318N A P Transmit data bit MSB 2 C Patent Rights to use 2 C Standard Specification 2003-02-19 ...
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... C T 20~65 C opr T 55~150 C stg 1250 10 mW/°C 850 150 Ambient temperature Ta (°C) Figure Curve D Description D8/D9 H DC/ TA1318N Min Typ. Max Unit 8.5 9.0 9.5 V 2.0 5.0 9.0 V p-p 2.0 5.0 9.0 0.02 0.20 H 0.45 0.25H 47H 1 400 s 0.9 1 ...
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... HA06) V thHD2 V thHD3 HP0 HP0 HP1 HP1 (Note HA07) HP2 HP2 HP3 HP3 (Note HA08 TA1318N Unit mA Min Typ. Max Unit 0.6 0.7 0.8 s 0.6 0.7 0.8 0.6 0.7 0 0.040 0.070 0.100 0.060 0.106 0.152 0.081 0.142 0.203 0.102 ...
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... HD output pulse width (free-run) TH10 TH11 Test Test Condition Circuit (Note HA09) d-HD ID1 ID2 (Note HB01) ID3 ID4 (Note HB02) VCO (Note HB03) 20 TA1318N Min Typ. Max Unit 1.0 1.2 1.4 s 4.5 5.0 5.5 0.1 0.5 4.5 5.0 5.5 0.1 ...
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... VDAC DAC3 output voltage VDAC Test Test Condition Circuit F00 F01 (Note HB04) F10 F11 F50 (Note HB05 TA1318N Min Typ. Max Unit 15.59 15.75 15.91 31.19 31.5 31.82 kHz 33.41 33.75 34.09 44.55 45 45.45 15.47 15.625 15.78 2.4 3.0 3.6 4 ...
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... V22IL0 V22IH1 V22IL1 V22IH2 V22IL2 V22IH3 V22IL3 V23IH0 V23IL0 V23IH1 V23IL1 V23IH2 V23IL2 V23IH3 V23IL3 (Note VA03 TA1318N Min Typ. Max Unit 0.65 0.75 0.85 V 0.65 0.75 0.85 p-p 0.65 0.75 0.85 0.65 0.75 0.85 V p-p 4.5 5.0 5.5 0.1 0.5 4 ...
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... Sync input-VD output phase difference 33.75 kHz 45.00 kHz Test Test Condition Circuit FV0 FV1 FV3 FV4 FV5 (Note VA04) FV6 (Note VA05) 23 TA1318N Min Typ. Max Unit 26.02 26.35 26.67 39.21 39.75 40.30 52.20 52.98 53.77 54.24 55.06 55.89 91 ...
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... Input Signal a (33.75 kHz ) to pin 19 (SYNC2-IN). (8) Set sub-address (02) 01. (9) Measure the phase difference 3qC, unless otherwise specified between pin 21 and pin 6 (AFC filter) wave form. 1PH between pin 19 and pin 6 (AFC filter) wave form. 2PH 29.63 Ps 0.593 Ps Signal a 0.285 1PH 2PH Pin 6 wave form TA1318N 2003-02-19 ...
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... Increasing the duty of Signal b to 100% (get negative period longer), measure the duty of Signal b (HD-DUTY2) when the phase between pin 11 and pin 13 (HD1OUT) change. Signal 3qC, unless otherwise specified between pin 11 and pin 6 (AFC filter) wave form. 3PH 31.75 Ps 2. 3PH 31.75 Ps 2. A/( 100 (%) * duty TA1318N 2003-02-19 ...
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... sync11 ) when HD-OUT desynchronizes with signal a calculate V sync12 , V and V as well. thS11 thS12 thS13 and V against pin 19 (SYNC2-IN) in the same way thS22 thS23 29.63 Ps 0.593 Ps 0.285 V thHD3 31. thHD1 TA1318N . thS10 when HD1-OUT lock. 2003-02-19 ...
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... Input Signal b (31.5 kHz) to pin 3 (HD1-IN). (3) Increasing the voltage of Signal b from 0 V, measure the voltage of Signal b V (4) Measure the voltage of pin 1 V Signal 3qC, unless otherwise specified when HD1-OUT lock. thHD1 . Measure the voltage of pin well. thHD2 thHD3 31. thHD1 TA1318N 2003-02-19 ...
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... When horizontal period of Signal 29.63 Ps measure'HP2 and 'HP2 as well. (8) When horizontal period of Signal 22.22 Ps measure'HP3 and 'HP3 as well. Signal b Pin 15 wave form data (00) Pin wave form data (7C) (80) Pin wave form data (FC 3qC, unless otherwise specified 63.5 Ps) to pin 11 (HD3-IN 2.35 Ps 1.5 V 'HP* 'HP* TA1318N 2003-02-19 ...
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... Measure the clamp pulse phase (CP 13 (HD-OUT). Signal a Pin 12 wave form Pin 13 wave form Pin 12 wave form 3qC, unless otherwise specified width (CP ), output level ( pin 12 (CLP-OUT) against width (CP ), output level ( pin 12 (SCP-OUT) against width (CP ), output level ( pin 12 (SCP-OUT) against pin 29.63 Ps 2. TA1318N 2003-02-19 ...
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... S19 S21 b (1) Set sub-address (00) 70. (2) Input Signal b (horizontal 31.5 kHz) to pin 11 (HD3-IN). (3) Set sub-address (02) 62. (4) Measure the pulse width (WdHD) of pin 6 (AFC filter) wave form. Signal b Pin 6 wave form 30 TA1318N 25 r 3qC, unless otherwise specified 31.75 Ps 2.35 Ps 1.5 V Wd-HD 2003-02-19 ...
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... ID3 [PA] (V3 [V]y1 [k:]) u1000 ID4 [PA] (V4 [V] y1 [k:]) u 1000 Pin 21 wave form Pin 6 wave form (1) Increasing the voltage of pin 8 V wave form 3qC, unless otherwise specified 63.5 Ps 0.25 V V1, V3 V2, V4 form 2.5V, measure the voltage V when pin 7 appear oscillation CC VCO TA1318N 2003-02-19 ...
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... Connect external voltage with pin 6 . Horizontal oscillation frequency is 15.75 kHz (00). Supply V6 (about pin 6, then measure the frequency FA pin 13 (HD1-OUT) wave form. Calculate frequency changing ratio (BH00). BH00 (4) When horizontal oscillation frequency is 31.5 kHz (01), 33.75 kHz (10), 45 kHz (11), calculate BH01, BH10, BH11 as wall. 32 TA1318N 25 r 3qC, unless otherwise specified (FB FA)/0.1 ...
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... Set sub-address (02) 03. (4) Increasing the voltage of Signal b from 0 V, measure the voltage of Signal a V Signal 3qC, unless otherwise specified thVD1 against pin 2 and pin 10 as wall. 16.67 ms 0.12 ms Signal a V thVD1 thVD3 16.67 ms 0.12 ms TA1318N when VD1-OUT lock. when VD1-OUT lock. 2003-02-19 ...
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... When sub-addrss (00) is B0, measure the pulse width VPW2 of pin 22 (VD1-OUT) wave form. (4) When sub-addrss (00) is 30, 70, F0, measure the pulse width VPW0, VPW1, VPW3 of pin 22 (VD1-OUT) wave form as well. Signal a Pin 22 wave form 34 TA1318N 25 r 3qC, unless otherwise specified 29.63 Ps 0.593 Ps V period ...
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... Input no-signal to pin 3 (HD1-IN). (5) Set sub-address (02) 42. (6) When sub-address (00) is 30, 70 F0, measure the frequency FV20, FV21, FV22 or FV23 of pin 22 (VD1-OUT) wave form. Signal a Pin 22 wave form 35 TA1318N 25 r 3qC, unless otherwise specified 29.63 Ps 0.593 Ps 0.285 V V period ...
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... Measure FVPL3 as well. Signal a Signal c Pin 22 wave form 3qC, unless otherwise specified 63.5 Ps) to pin 11 (HD3-IN). 1ms) to pin 10 (VD3-IN). Increasing vertical period of Signal C, 22.22 Ps) to pin 11 (HD3-IN). horizontal period TPs 0.593 Ps 1 period (initial T 1 ms) 0.25 ms 1.5 V measuring period TA1318N 2003-02-19 ...
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... Test Circuit REG # Pin SW18 Pin 20 SYNC1 SYNC2 SW21 SW19 #23 #22 #21 #20 # TA1318N SW6 Pin 6 Pin 2 Pin 3 Pin SCL SDA #18 #17 #16 # #10 #11 Pin 7 Pin 9 Pin 10 Pin 11 Pin TA1318N TP 1- # #12 Mylar capacitor 2003-02-19 ...
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... Application Circuit 1 (Typical values DAC3 24 1 HD2-IN VD2- VD1- SYNC1- SYNC2- DAC1 OUT OUT TA1318N 360 : CSBLA503 VD2-IN HD1-IN VD1-IN KECZF30 38 HD2- SCL SDA OUT 0.01 PF 100 PF DAC2 VD3-IN HD3-IN CP-OUT @ M TA1318N HD1- OUT 13 12 Mylar capacitor 2003-02-19 ...
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... H-AFC stability, I transmission and so on via prototype TV set evaluation. Signal 1 AFC SYNC1-IN for H-AFC Internal pulse (A) Signal 2 SYNC2-IN for H/V freq. counter TA1318N 39 TA1318N BUS READ H/V FREQ COUNTER 2 C BUS data 2003-02-19 ...
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... Package Dimensions Weight: 1.22 g (typ.) 40 TA1318N 2003-02-19 ...
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... TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. x The information contained herein is subject to change without notice. 41 TA1318N 000707EBA 2003-02-19 ...
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