MAX9850ETI+T Maxim Integrated Products, MAX9850ETI+T Datasheet - Page 6

• Manufacturer Part Number: MAX9850ETI+T
• Description: IC AMP AUDIO .095W STER 28TQFN
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive™r
• Type: Class ABr

Specifications of MAX9850ETI+T

• Output Type: Headphones, 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 95mW x 2 @ 16 Ohm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Features: DAC, Depop, Digital Inputs, I²C, I²S, Line Level Inputs & Outputs, Mute, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 28-WQFN Exposed Pad, 28-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING CHARACTERISTICS
(DV
R
T
Stereo Audio DAC with DirectDrive
Headphone Amplifier
6
Note 1: The MAX9850 is 100% production tested at T
Note 2: Full operation is defined as clocking all zeros into the DAC while the DAC, headphone outputs, and line outputs are all enabled.
Note 3: DAC performance specifications measured using the line outputs, OUTL and OUTR.
Note 4: Dynamic range is defined as the SNR of a 1kHz, -60dBFS input signal measured with an A-weighted filter, then normalized
I
Serial Clock Frequency
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
SCL Pulse-Width Low
SCL Pulse-Width High
Repeated START Condition
Setup Time
Data Hold Time
Data Setup Time
Bus Capacitance
SDA and SCL Receiving Rise
Time (Note 8)
SDA and SCL Receiving Fall
Time (Note 8)
SDA Transmitting Fall Time
(Note 8)
Setup Time for STOP Condition
Pulse Width of Suppressed Spike
DIGITAL AUDIO TIMING
BCLK Period (Note 9)
Low or High BCLK Pulse Width
BCLK and LRCLK Rise Time
BCLK and LRCLK Fall Time
SDIN or LRCLK to BCLK Rising
Setup Time
SDIN or LRCLK to BCLK Rising
Hold Time
MAX
LOAD_HP
2
C TIMING
DD
_______________________________________________________________________________________
, unless otherwise noted. Typical specifications at T
= AV
to full scale (+60dB).
= 32Ω to AGND, R
PARAMETER
DD
= PV
DD
= 3.0V, AGND = DGND = PGND = 0V, C1 = 0.47µF, C2 = 2.2µF, C
LOAD_LINE
SYMBOL
t
t
t
t
t
BCLK_PW
t
HD, STA
HD, DAT
SU, DAT
SU, STO
SU, STA
t
t
t
t
t
DBSU,
t
BWBH
t
BWSU
f
t
HIGH
BCLK
DBH,
LOW
= 10kΩ to AGND, f
SCL
BUF
C
t
t
t
t
t
SP
t
R
R
F
F
F
B
DV
DV
Master mode, C
Master mode, C
DV
DV
A
DD
DD
DD
DD
= +25°C and is guaranteed by design for T
= 1.8V, T
= 3.6V, T
= 1.8V
= 3.6V
A
= +25°C, unless otherwise noted.) (Note 1)
LRCLK
CONDITIONS
A
A
LOAD
LOAD
= 48kHz, f
= +25°C
= +25°C
= 15pF
= 15pF
MCLK
= 12.288MHz, volume set to -9.5dB, T
NREG
A
0.05C
1 / f
0.1C
0.1C
0.1C
0.35 x
t
20 +
20 +
20 +
20 +
BCLK
MIN
= T
100
1.3
0.6
1.3
0.6
0.6
0.6
3 x
30
= C
0
0
0
IC LK
MIN
B
B
B
B
PREG
to T
TYP
MAX
= C
1
1
REF
.
MAX
= 1µF to AGND,
400
900
400
300
300
250
250
50
0
5
A
= T
UNITS
kHz
MIN
pF
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
to