SAA7120H NXP Semiconductors, SAA7120H Datasheet
SAA7120H
Available stocks
Related parts for SAA7120H
SAA7120H Summary of contents
Page 1
... DATA SHEET SAA7120H; SAA7121H Digital video encoder Product specification Supersedes data of 1997 Jan 06 INTERGRATED CIRCUITS 2002 Oct 11 ...
Page 2
... Analog output voltages 10 PACKAGE OUTLINE 11 SOLDERING 11.1 Introduction to soldering surface mount packages 11.2 Reflow soldering 11.3 Wave soldering 11.4 Manual soldering 11.5 Suitability of surface mount IC packages for wave and reflow soldering methods 12 DATA SHEET STATUS 13 DEFINITIONS 14 DISCLAIMERS 15 PURCHASE OF PHILIPS I 2002 Oct COMPONENTS 2 Product specification SAA7120H; SAA7121H ...
Page 3
... Controlled rise/fall times of synchronization and blanking output signals Macrovision rev. 7.01 and rev. 6.1 as option; this applies to SAA7120H only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only ...
Page 4
... Oct 11 PARAMETER RCV1 21 SAA7120H SAA7121H clock and timing Y Y ENCODER C-bus control 1, 20, 22, 23, 26 RES RTCI Fig.1 Block diagram. 4 SAA7120H; SAA7121H MIN. TYP. 3.1 3.3 3.0 3 TTL compatible 1. DDA1, TTXRQ XTALO LLC V DDA2 , V DDA3 RCV2 XCLK XTALI 7 8 ...
Page 5
... DACs analog ground 2 for the oscillator and reference voltage crystal oscillator output crystal oscillator input; if the oscillator is not used, this pin should be connected to ground analog supply voltage 4 for the oscillator and reference voltage 5 Product specification SAA7120H; SAA7121H DESCRIPTION -Y-C data B R ...
Page 6
... C-bus serial clock input 2 I C-bus serial data input/output teletext request output, indicating when bit stream is valid teletext bit stream input SAA7120H SAA7121H Fig.2 Pin configuration. 6 Product specification SAA7120H; SAA7121H DESCRIPTION 33 V SSA2 V SSA1 32 V DDA3 31 CVBS 30 29 RES V DDA2 ...
Page 7
... Macrovision anti-taping process such as additional insertion of AGC super-white pulses (programmable in height) are supported by the SAA7120H only. In order to enable easy analog post filtering, luminance is interpolated from a 13.5 MHz data rate MHz data rate, providing luminance in 10-bit resolution. This filter is also used to define smoothed transients for synchronization pulses and blanking period ...
Page 8
... Outputs of the DACs can be set together in two groups, via software control minimum output voltage for either purpose. 7.4 The synchronization of the SAA7120H; SAA7121H is able to operate in two modes; slave mode and master mode. In the slave mode, the circuit accepts synchronization pulses at the bidirectional RCV1 port. The timing and trigger behaviour related to RCV1 can be influenced by programming the polarity and the on-chip delay of RCV1 ...
Page 9
... The I C-bus slave address is defined as 88H with pin 21 (SA) tied LOW and as 8CH with pin 21 (SA) tied HIGH. 7.6 Input levels and formats The SAA7120H; SAA7121H expects digital Y, C and C data with levels (digital codes) in accordance R with “CCIR 601” . For C and CVBS outputs, deviating amplitudes of the ...
Page 10
Acrobat reader. white to force landscape pages to be ... 7.7 Bit allocation map Table 3 Slave receiver (slave address 88H or 8CH) REGISTER ...
Page 11
Acrobat reader. white to force landscape pages to be ... REGISTER FUNCTION SUBADDR Line 21 even 0 69H L21E07 Line 21 even 1 6AH ...
Page 12
... ACK DATA 0 ACK -------- aspect ratio enhanced services subtitles reserved DESCRIPTION 12 Product specification SAA7120H; SAA7121H DATA n ACK P DESCRIPTION DESCRIPTION REMARKS PAL (21H); default after reset NTSC (19H) PAL (1DH); default after reset NTSC (1DH) bit RTCE must be set to logic 1 (see Fig ...
Page 13
... VALUE 00H 2AH 88H AAH 13 Product specification SAA7120H; SAA7121H REMARKS LSBs of the respective bytes are encoded immediately after run-in and framing code, the MSBs of the respective bytes have to carry the parity bit, in accordance with the definition of line 20 encoding format DESCRIPTION ...
Page 14
... IRE; note 2 BLCKL = 0; note 2 BLCKL = 63 (3FH); note 2 logic 0 logic 1 2/6.29 + 34.0. 2/6.18 + 31.7. 14 Product specification SAA7120H; SAA7121H REMARKS GAINU = 2.17 nominal to +2.16 output subcarrier of U contribution = 0 output subcarrier of U contribution = nominal GAINU = 2.05 nominal to +2.04 output subcarrier of U contribution = 0 output subcarrier of U contribution = nominal REMARKS GAINV = 1 ...
Page 15
... DESCRIPTION DESCRIPTION 15 Product specification SAA7120H; SAA7121H REMARKS recommended value: BLNNL = 46 (2EH) output blanking level = 25 IRE output blanking level = 45 IRE recommended value: BLNNL = 53 (35H) output blanking level = 26 IRE output blanking level = 46 IRE disable subcarrier phase reset bit from RTCI enable subcarrier phase reset bit from RTCI (see Fig ...
Page 16
... Table 20 Subaddress 62H DATA BYTE DESCRIPTION BSTA amplitude of colour burst; input representation in accordance with “CCIR 601” 2002 Oct 11 SAA7120H; SAA7121H DESCRIPTION black 100 IRE; default after reset black 92.5 IRE including 7.5 IRE set-up of black DESCRIPTION CONDITIONS white-to-black = 92.5 IRE; burst = 40 IRE; NTSC encoding BSTA = ...
Page 17
... Oct 11 CONDITIONS FSC = round note 1 FSC = 569408543 (21F07C1FH). = 1728 FSC = 705268427 (2A098ACBH). llc DESCRIPTION DESCRIPTION 17 Product specification SAA7120H; SAA7121H REMARKS FSC3 = most significant byte ------ 2 ; FSC0 = least significant byte f llc REMARKS LSBs of the respective bytes are encoded ...
Page 18
... Oct 11 AS INPUT VS VS vertical sync each field; default after reset FS FS frame sync (odd/even) FSEQ FSEQ field sequence, vertical sync every fourth field (PAL = 0) or eighth field (PAL = 1) not applicable DESCRIPTION DESCRIPTION 18 Product specification SAA7120H; SAA7121H FUNCTION DESCRIPTION DESCRIPTION ...
Page 19
... TTXRQ; see Fig.10 TTXHD indicates the delay in clock cycles between rising edge of TTXRQ output and valid data at pin TTX 2002 Oct 11 DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 19 Product specification SAA7120H; SAA7121H REMARKS PAL: TTXHS = 42H NTSC: TTXHS = 54H minimum value: TTXHD = 2 ...
Page 20
... DESCRIPTION DESCRIPTION DESCRIPTION enables NABTS (FISE = 1) or European TTX (FISE = 0); default after reset enables world standard teletext 60 Hz (FISE = 1) 20 Product specification SAA7120H; SAA7121H REMARKS standard value: VS_S = 3 REMARKS PAL: TTXOVS = 05H; NTSC: TTXOVS = 06H PAL: TTXOVE = 16H; NTSC: TTXOVE = 10H REMARKS PAL: TTXEVS = 04H ...
Page 21
... O_E as LSB (repetition rate: NTSC = 4 fields, PAL = 8 fields) during even field during odd field 21 Product specification SAA7120H; SAA7121H DATA BYTE FSEQ2 FSEQ1 ...
Page 22
... SCBW = 1. (2) SCBW = 0. handbook, halfpage (1) SCBW = 1. (2) SCBW = 0. 2002 Oct 11 ( Fig.3 Chrominance transfer characteristic (dB) 0 (1) ( 0.4 0.8 1.2 Fig.4 Chrominance transfer characteristic 2. 22 Product specification SAA7120H; SAA7121H MBE737 (MHz) MBE735 1.6 f (MHz) 14 ...
Page 23
... CCRS1 = 0; CCRS0 = 0. 2002 Oct 11 (4) (2) (3) ( (3) CCRS1 = 1; CCRS0 = 1. (4) CCRS1 = 0; CCRS0 = 0. Fig.5 Luminance transfer characteristic (dB) ( Fig.6 Luminance transfer characteristic 2. 23 Product specification SAA7120H; SAA7121H (MHz) MBE736 6 f (MHz) MGD672 14 ...
Page 24
... HIGH LLC t rise time r t fall time f Input timing: RCV1, RCV2, MP7 to MP0, RTCI, SA and TTX t input data set-up time SU;DAT t input data hold time HD;DAT 2002 Oct 11 SAA7120H; SAA7121H CONDITIONS MIN. 3.1 3.0 note 3.3 V; note 1 DDD 0.5 2.0 clocks data I/Os at high-impedance ...
Page 25
... For full digital range, without load, V voltage (digital zero at DAC) is 0.2 V. 2002 Oct 11 CONDITIONS 3rd harmonic note 4 note 3.3 V. The typical voltage swing is 1.35 V, the typical minimum output DDA 25 Product specification SAA7120H; SAA7121H MIN. MAX. UNIT 30 MHz +50 10 ...
Page 26
... HD; DAT LLC t HIGH t HD; DAT t f valid not valid HD; DAT valid not valid Fig.7 Clock data timing (0) Y(0) Fig.8 Functional timing. 26 Product specification SAA7120H; SAA7121H valid valid MBE742 C R (0) Y(1) 2.6 V 1.5 V 0.6 V 2.4 V 1.5 V 0.8 V 2.0 V 0.8 V 2.4 V 0.6 V ...
Page 27
... If the colour detection bit is enabled (RTCE = 1; DECCOL = 1) and no colour was detected (colour detection bit = 0), the subcarrier frequency is Y) generated by the SAA7120H; SAA7121H. In the other case (colour detection bit = 1) the subcarrier frequency is evaluated out of FSCPLL increment. If the colour detection bit is disabled (RTCE = 1; ...
Page 28
... TTXOVE) plus all suitable lines of the even field (TTXEVS and TTXEVE) can be used for teletext insertion Fig.10 Teletext timing. 28 Product specification SAA7120H; SAA7121H is the internally used insertion window for TTXWin t TTXWin MBH788 ...
Page 29
... 0 27.0 MHz X1 3rd harmonic V DDD1 , V DDD2 , V DDD3 XTALI XTALO 17, 39 use one capacitor for each V DDD digital inputs and SAA7120H outputs SAA7121H (1) Typical value. 100 (2) For colour bar. 100 3.3 V analog 0.1 F 0.1 F DGND 0.1 F 0.1 F AGND V DDA4 V DDA1 V DDA2 ...
Page 30
... Table 42 for a colour bar signal. 100 Values for the external series resistors result Table 42 Digital output signals conversion range CVBS SYNC-TIP TO PEAK-CARRIER (digits) 1016 2002 Oct 11 load. CONVERSION RANGE (peak-to-peak) 30 Product specification SAA7120H; SAA7121H Y (VBS) SYNC-TIP TO WHITE (digits) 881 ...
Page 31
... 2.5 scale (1) ( 0.40 0.25 10.1 10.1 12.9 0.8 0.20 0.14 9.9 9.9 12.3 REFERENCES JEDEC EIAJ 31 SAA7120H; SAA7121H detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION Product specification SOT307 (1) ( ...
Page 32
... To overcome these problems the double-wave soldering method was specifically developed. 2002 Oct 11 SAA7120H; SAA7121H If wave soldering is used the following conditions must be observed for optimal results: Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave ...
Page 33
... Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 Oct 11 (1) not suitable not suitable suitable not recommended not recommended 33 Product specification SAA7120H; SAA7121H SOLDERING METHOD (2) WAVE REFLOW suitable (3) suitable suitable (4)(5) suitable ...
Page 34
... Product specification SAA7120H; SAA7121H DEFINITION These products are not Philips Semiconductors ...
Page 35
... Philips. This specification can be ordered using the code 9398 393 40011. 2002 Oct 11 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 35 Product specification SAA7120H; SAA7121H 2 C patent to use the 2 C specification defined by ...
Page 36
Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited ...