TDA6650TT NXP Semiconductors, TDA6650TT Datasheet
TDA6650TT
Available stocks
Related parts for TDA6650TT
TDA6650TT Summary of contents
Page 1
... Rev. 05 — 10 January 2007 1. General description The TDA6650TT; TDA6651TT is a programmable 3-band mixer/oscillator and low phase noise PLL synthesizer intended for pure 3-band tuner concepts applied to hybrid (digital and analog) or digital only terrestrial and cable TV reception. ...
Page 2
... ADC I Wideband AGC detector for internal tuner AGC: TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer 2 C-bus; six serial bytes are required to address the device, 2 C-bus write mode) ...
Page 3
... TSSOP38 TDA6650TT/C3/S2 TDA6651TT/C3 TDA6651TT/C3/S2 TDA6651TT/C3/S3 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Description plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm Rev. 05 — 10 January 2007 / 40 pF. © NXP B.V. 2007. All rights reserved. ...
Page 4
... SDA I C-BUS 17 (22) TRANSCEIVER AS 13 (26) BVS POR The pin numbers in parenthesis represent the TDA6651TT. Fig 1. Block diagram TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer IFFIL1 V IFFIL2 CCA 26 (13) 6 (33) 7 (32) LOW MIXER BS1 MID MIXER ...
Page 5
... SDA AS XTOUT XTAL1 XTAL2 n CCD PLLGND V CCA IFOUTB IFOUTA IFGND HOSCIN1 HOSCOUT1 HOSCOUT2 HOSCIN2 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Pin description Pin TDA6650TT TDA6651TT ...
Page 6
... XTOUT XTAL1 19 Fig 2. Pin configuration TDA6650TT 7. Functional description 7.1 Mixer, Oscillator and PLL (MOPLL) functions Bit BS1 enables the BS1 port, the low band mixer and the low band oscillator. Bit BS2 enables the BS2 port, the mid band mixer and the mid band oscillator. When both BS1 and BS2 bits are logic 0, the high band mixer and the high band oscillator are enabled ...
Page 7
... Open-circuit 7.3 Phase noise, I While the TDA6650TT; TDA6651TT is dedicated for hybrid terrestrial applications, the low noise PLL will clean up the noise spectrum of the VCOs close to the carrier to reach noise levels at 1 kHz offset from the carrier compatible with e.g. DVB-T reception. TDA6650TT_6651TT_5 Product data sheet TDA6650TT ...
Page 8
... C-bus transceiver has an auto-increment facility that permits programming the device within one single transmission (address + 5 data bytes). The TDA6650TT; TDA6651TT can also be partly programmed on the condition that the first data byte following the address is byte 2 (divider byte 1) or byte 4 (control byte 1). The fi ...
Page 9
... N14 to N0 T/A T2, T1 and T0 R2, R1 and R0 ATC AL2, AL1 and AL0 CP2, CP1 and CP0 BS5, BS4, BS3, BS2 and BS1 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer DIVIDER CONTROL CONTROL CONTROL BYTE 2 BYTE 1 BYTE 2 BYTE 1 2 ...
Page 10
... When Rev. 05 — 10 January 2007 TDA6650TT; TDA6651TT Table 8 gives the relationship MA1 Mode normal mode with XTOUT buffer off (4 MHz) normal mode with XTOUT buffer on ...
Page 11
... The charge pump current can be chosen from 8 values depending on the value of bits CP2, CP1 and CP0 bits; see account when ALBC mode is in use. Table 12. CP2 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Reference divider ratio select bits R1 R0 Reference divider ratio ...
Page 12
... The TDA6650TT; TDA6651TT includes the ALBC feature that automatically sets the band and the charge pump current, provided the IC is used in the DVB-T standard application shown in power-on reset ...
Page 13
... Name Address byte 1 Status byte [1] MSB is transmitted first. Table 16. Bit A POR FL TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer ALBC band selection and charge current setting Band low mid mid mid mid mid mid mid high ...
Page 14
... Bit MSB N14 = X N13 = [ [ CP2 = 1 CP1 = 1 CP0 = 1 Rev. 05 — 10 January 2007 TDA6650TT; TDA6651TT …continued < AGC RML > V AGC RMH Table Table 18 MA1 N12 = X N11 = X N10 = ...
Page 15
... HBIN1 1 38 HBIN2 2 37 MBIN 3 36 LBIN 4 35 RFGND 5 34 IFFIL1 6 33 IFFIL2 7 32 BS4 8 31 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Average DC voltage versus band selection Low Mid High n.a. n.a 1.0 V n.a. n.a 1.0 V n.a. 1.8 V n.a. 1.8 V n.a. n 3.7 V 3.7 V 3.7 V 3 ...
Page 16
... BS3 10 29 BS2 11 28 BS1 12 27 BVS 13 26 ADC/BS5 14 25 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid High 3.5 V 3.5 V 3.5 V high-Z or high-Z or high-Z or ...
Page 17
... SDA XTOUT 18 21 XTAL1 19 20 XTAL2 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid High high-Z high-Z high-Z high-Z high-Z high-Z 1.25 V 1.25 V 1.25 V 3.45 V 3.45 V 3. ...
Page 18
... IFOUTA 28 11 IFGND 29 10 HOSCIN1 30 9 HOSCOUT1 31 8 HOSCOUT2 32 7 HOSCIN2 33 6 TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid High 1.8 V 1 ...
Page 19
... IC and negative currents are going out of the IC; all voltages are referenced to ground [1] . Symbol V CCA V CCD SDA I SDA V SCL V AS TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid 2.3 V 1.3 V 2 1.7 V 1.4 V 2.9 V 3.5 V Limiting values Parameter Conditions ...
Page 20
... The junction temperature influences strongly the reliability of an IC. The printed-circuit board used in the application contributes in a large part to the overall thermal characteristic. It must therefore be insured that the junction temperature of the IC never exceeds T TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Limiting values …continued Parameter ...
Page 21
... Z output impedance o TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer 30 for hybrid application; unless otherwise specified. Conditions PMOS ports off one PMOS port on: sourcing 15 mA two PMOS ports on: one port sourcing ...
Page 22
... V tuning supply voltage = integrated between 1 kHz and 1 MHz offset from the carrier digital only application: TDA6650TT/C3/S2; TDA6651TT/C3/S2; TDA6651TT/C3/S3 hybrid application: TDA6650TT/C3; TDA6651TT/C3 picture carrier for digital only application: TDA6650TT/C3/S2; TDA6651TT/C3/S2; TDA6651TT/C3/S3 picture carrier for hybrid application: TDA6650TT/C3; TDA6651TT/C3 Rev. 05 — ...
Page 23
... MHz RF asymmetrical application; see f = 44.25 MHz 157.25 MHz RF symmetrical application; see f = 44.25 MHz 157.25 MHz RF asymmetrical IF output hybrid application: TDA6650TT/C3; TDA6651TT/C3 RFpix see Figure 44.25 MHz; see Figure 157.25 MHz; see Figure 44.25 MHz to 157.25 MHz; RF see ...
Page 24
... RF(unwanted) asymmetrical IF output see Figure 25 see Figure 6 see Figure 6 picture carrier for digital only application: TDA6650TT/C3/S2; TDA6651TT/C3/S2; TDA6651TT/C3/S3 picture carrier for hybrid application: TDA6650TT/C3; TDA6651TT/C3 asymmetrical IF output; load = 75 ; see Figure 443.25 MHz 863.25 MHz RF symmetrical IF output; load = 1. see Figure 443 ...
Page 25
... MHz; see Figure 863.25 MHz; see Figure with compensation CC TDA6650TT/C3/S2; TDA6651TT/C3/S2; TDA6651TT/C3/S3 1 kHz frequency offset; f comp see Figure 8, 27 and 28 10 kHz frequency offset; worst case in the frequency range; see Figure 9, 27 and 28 100 kHz frequency offset ...
Page 26
... Figure 10, 27 and 28 1.4 MHz frequency offset; worst case in the frequency range; see Figure 27 TDA6650TT/C3; TDA6651TT/C3 1 kHz frequency offset; f comp see Figure 11, 29, and 30 10 kHz frequency offset; worst case in the frequency range; see Figure ...
Page 27
... Figure 10, 27 and 28 1.4 MHz frequency offset; worst case in the frequency range; see Figure 27 TDA6650TT/C3; TDA6651TT/C3 1 kHz frequency offset; f comp see Figure 11, 29, and 30 10 kHz frequency offset; worst case in the frequency range; see Figure ...
Page 28
... FM kHz 38.9 MHz step [17] bits AL[2:0] = 000 maximum level TDA6650TT/C3; TDA6651TT/C3; TDA6650TT/C3/S2; TDA6651TT/C3/S2 TDA6651TT/C3/S3 minimum level bits AL[2:0] = 111 TDA6650TT/C3; TDA6651TT/C3; TDA6650TT/C3/S2; TDA6651TT/C3/S2 TDA6651TT/C3/S3 AGC bit = 0 or AGC not active AGC bit = 1 or AGC active bits AL[2:0] = 110 < V AGC , as defi ...
Page 29
... The step frequency rejection is the level of step frequency sidebands (e.g. 166.67 kHz) related to the carrier. [16] This is the level of the 9th and 11th harmonics of the 4 MHz crystal oscillator into the IF output. [17] Pin AGC (pin 9 for TDA6650TT, pin 30 for TDA6651TT) must not be connected to a voltage higher than 3 ...
Page 30
... Fig 6. Input admittance ( the mid band mixer (100 MHz to 500 MHz Fig 7. Input impedance ( the high band mixer (400 MHz to 900 MHz TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer ...
Page 31
... For measurement circuit see Fig 9. 10 kHz phase noise typical performance in digital application TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer 240 340 440 Figure 27 and 28 240 340 440 Figure 27 and 28 Rev. 05 — ...
Page 32
... For measurement circuit see Fig 11. 1 kHz phase noise typical performance in hybrid application TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer 240 340 440 Figure 27 and 28 240 340 440 Figure 29 and 30 Rev. 05 — ...
Page 33
... For measurement circuit see Fig 13. 100 kHz phase noise typical performance in hybrid application TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer 240 340 440 Figure 29 and 30 240 340 440 Figure 29 ...
Page 34
... NXP Semiconductors Fig 14. Gain (G Fig 15. Gain (G TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer signal source meas V i RMS voltmeter Z >> meas meas V = V’ + 3.75 dB. ...
Page 35
... 2.5 pF trimmer 4.7 nF turns, 4.5 mm, wire semi rigid cable, length = 75 mm. Fig 17. Input circuit for optimum noise figure in low and mid band TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer LBIN BNC RIM or MBIN INPUT DUT ...
Page 36
... Wanted signal source at f RFpix The level of unwanted signal turns turns. N1/ Fig 19. Cross modulation measurement in low and mid band with symmetrical IF output TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer LBIN A C IFOUTA or MBIN V ...
Page 37
... NXP Semiconductors Fig 20. Gain ( Fig 21. Gain (G TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer signal source 50 A HYBRID meas RMS voltmeter Loss in hybrid = 1 dB loss = meas V = V’ + 3.75 dB. ...
Page 38
... The level of unwanted signal is measured by causing 0 modulation in the wanted signal turns turns. N1/ Fig 24. Cross modulation measurement in high band with symmetrical IF output TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer A HBIN1 C DUT HYBRID B D HBIN2 ...
Page 39
... Fig 25. Maximum RF input level without lock-out in low and mid band with asymmetrical Fig 26. Maximum RF input level without lock-out in high band with asymmetrical IF output 12.1 PLL loop stability of measurement circuit The TDA6650TT; TDA6651TT PLL loop stability is guaranteed in the configuration of Figure 27, 28, minimum, the pull-up resistor R19 and all of the local oscillators are aligned to operate at a maximum tuning voltage the confi ...
Page 40
... the pull-up resistor between the DC supply source (or the DC-to-DC converter pu output) and the tuning line (R19 the charge pump current in use. CP TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer V – ------------------------ I CP ...
Page 41
... OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 BS4 TDA6650TT HOSCOUT1 8 (31) (8) 31 AGC (TDA6651TT) HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) (12) 27 ...
Page 42
... OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 BS4 TDA6650TT HOSCOUT1 8 (31) (8) 31 AGC (TDA6651TT) HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) (12) 27 ...
Page 43
... OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 BS4 TDA6650TT HOSCOUT1 8 (31) (8) 31 AGC (TDA6651TT) HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) (12) 27 ...
Page 44
... OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 BS4 TDA6650TT HOSCOUT1 8 (31) (8) 31 AGC (TDA6651TT) HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) (12) 27 ...
Page 45
... Crystal oscillator The TDA6650TT; TDA6651TT needs to be used with a 4 MHz crystal in series with a capacitor with a typical value of 18 pF, connected between pin XTAL1 and pin XTAL2. NXP crystal 4322 143 04093 is recommended. When choosing a crystal, take care to select a crystal able to withstand the drive level of the TDA6650TT ...
Page 46
... DB1 and DB2 bytes Address byte C2 A Sequence to change the charge pump current, the ports and the AGC data Address byte Control byte Rev. 05 — 10 January 2007 TDA6650TT; TDA6651TT Table can be used, while other Control Control [1] byte 1 byte 2 A ...
Page 47
... C2 [1] Control byte 1 with bit T program test bits T2, T1 and T0 and reference divider ratio bits R2, R1 and R0. TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Sequence to change only the AGC data Address byte C2 A Sequence to program the main divider, the ALBC on and the test modes in normal ...
Page 48
... Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT510-1 Fig 31. Package outline SOT510-1 (TSSOP38) TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer ...
Page 49
... Inspection and repair • Lead-free soldering versus PbSn soldering 16.3 Wave soldering Key characteristics in wave soldering are: TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer Rev. 05 — 10 January 2007 © NXP B.V. 2007. All rights reserved ...
Page 50
... Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer and 32 SnPb eutectic process (from J-STD-020C) Package reflow temperature ( C) ...
Page 51
... MSB OFDM PAL PLL PMOS QAM VCO VCR TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Abbreviations Description ...
Page 52
... The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors Legal texts have been adapted to the new company name where appropriate Table 3 “Ordering information” updated with type numbers TDA6650TT/C3/S2, DA6651TT/C3/S2 and TDA6651TT/C3/S3 Table 22 “Characteristics” condition of leakage current (I 0 < ...
Page 53
... Contact information For additional information, please visit: For sales office addresses, send an email to: TDA6650TT_6651TT_5 Product data sheet TDA6650TT; TDA6651TT 5 V mixer/oscillator and low noise PLL synthesizer [3] Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. ...
Page 54
... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: TDA6650TT_6651TT_5 All rights reserved. Date of release: 10 January 2007 ...