PCA9551D NXP Semiconductors, PCA9551D Datasheet

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PCA9551D

Manufacturer Part Number
PCA9551D
Description
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer
NXP Semiconductors
Datasheet

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PCA9551D
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NXP Semiconductors
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1. General description
2. Features
The PCA9551 LED blinker blinks LEDs in I
necessary to limit bus traffic or free up the I
etc.) timer. The uniqueness of this device is the internal oscillator with two programmable
blink rates. To blink LEDs using normal I/O expanders like the PCF8574 or PCA9554, the
bus master must send repeated commands to turn the LED on and off. This greatly
increases the amount of traffic on the I
PCA9551 LED blinker instead requires only the initial set-up command to program BLINK
RATE 1 and BLINK RATE 2 (i.e., the frequency and duty cycle) for each individual output.
From then on, only one command from the bus master is required to turn each individual
open-drain output on, off, or to cycle at BLINK RATE 1 or BLINK RATE 2. Maximum output
sink current is 25 mA per bit and 100 mA per package.
Any bits not used for controlling the LEDs can be used for General Purpose parallel
Input/Output (GPIO) expansion.
The active LOW hardware reset pin (RESET) and Power-On Reset (POR) initializes the
registers to their default state, all zeroes, causing the bits to be set HIGH (LED off).
Three hardware address pins on the PCA9551 allow eight devices to operate on the same
bus.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9551
8-bit I
Rev. 07 — 23 February 2007
8 LED drivers (on, off, flashing at a programmable rate)
2 selectable, fully programmable blink rates (frequency and duty cycle) between
0.148 Hz and 38 Hz (6.74 seconds and 0.026 seconds)
Input/outputs not used as LED drivers can be used as regular GPIOs
Internal oscillator requires no external components
I
Internal power-on reset
Noise filter on SCL/SDA inputs
Active LOW reset input
8 open-drain outputs directly drive LEDs to 25 mA
Edge rate control on outputs
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
0 Hz to 400 kHz clock frequency
2
C-bus interface logic compatible with SMBus
2
C-bus LED driver with programmable blink rates
2
C-bus and uses up one of the master's timers. The
2
2
C-bus and SMBus applications where it is
C-bus master's (MCU, MPU, DSP, chip set,
Product data sheet

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PCA9551D Summary of contents

Page 1

PCA9551 8-bit I Rev. 07 — 23 February 2007 1. General description The PCA9551 LED blinker blinks LEDs in I necessary to limit bus traffic or free up the I etc.) timer. The uniqueness of this device is the internal ...

Page 2

... Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO16, TSSOP16, HVQFN16 3. Ordering information Table 1. Ordering information +85 C. amb Type number Topside mark PCA9551D PCA9551D PCA9551PW PCA9551 PCA9551BS 9551 4. Block diagram PCA9551 SCL INPUT FILTERS SDA V DD ...

Page 3

... LED4 LED5 LED6 PCA9551_7 Product data sheet 2 8-bit I C-bus LED driver with programmable blink rates SDA SCL 4 13 RESET PCA9551D 5 12 LED7 6 11 LED6 7 10 LED5 8 9 LED4 SS 002aac500 terminal 1 index area LED0 3 LED1 4 LED2 ...

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... NXP Semiconductors Table 2. Symbol LED7 RESET SCL SDA V DD [1] HVQFN package die supply ground is connected to both V connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region ...

Page 5

... NXP Semiconductors If the Auto-Increment (AI) flag is set, the three low order bits of the Control register are automatically incremented after a read or write. This allows the user to program the registers sequentially. The contents of these bits will rollover to ‘000’ after the last register is accessed. ...

Page 6

... NXP Semiconductors Table 5. Bit Symbol Default 6.3.3 PWM0 - Pulse Width Modulation 0 The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED off) when the count is less than the value in PWM0 and HIGH when it is greater. If PWM0 is programmed with 00h, then the PWM0 output is always LOW. ...

Page 7

... NXP Semiconductors 6.3.6 LS0 to LS1 - LED selector registers The LSn LED select registers determine the source of the LED data output is set LOW (LED on output is set high-impedance (LED off; default output blinks at PWM0 rate 11 = output blinks at PWM1 rate Table 9. Legend: * default value. ...

Page 8

... NXP Semiconductors 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 9

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 9. System configuration 7.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 10

... NXP Semiconductors 7.4 Bus transactions SCL slave address SDA START condition write to register data out from port Fig 11. Write to register slave address SDA START condition acknowledge slave address (cont ...

Page 11

... NXP Semiconductors 8. Application design-in information C-BUS/SMBus MASTER Fig 14. Typical application 8.1 Minimizing I When the I/Os are used to control LEDs, they are normally connected to V resistor as shown in I about 1.2 V less than V I lower than V Designs needing to minimize current consumption, such as battery power applications, ...

Page 12

... NXP Semiconductors 8.2 Programming example The following example will show how to set LED0 to LED3 on. It will then set LED4 and LED5 to blink duty cycle. LED6 and LED7 will be set to blink and duty cycle. Table 10. Program sequence START ...

Page 13

... NXP Semiconductors 10. Static characteristics Table 12. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb I additional quiescent supply DD current V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage ...

Page 14

... NXP Semiconductors 20 % (1) percent variation (1) maximum (2) average (3) minimum Fig 17. Typical frequency variation over process 2 3 PCA9551_7 Product data sheet 2 8-bit I C-bus LED driver with programmable blink rates 002aac191 20 % percent variation 100 ...

Page 15

... NXP Semiconductors 11. Dynamic characteristics Table 13. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t set-up time for a repeated START SU;STA condition t set-up time for STOP condition SU;STO ...

Page 16

... NXP Semiconductors START SCL SDA RESET 50 % LEDn Fig 19. Definition of RESET timing SDA t BUF t LOW SCL t HD;STA P S Fig 20. Definition of timing PCA9551_7 Product data sheet 2 8-bit I C-bus LED driver with programmable blink rates rec(rst HD;DAT HIGH SU ...

Page 17

... NXP Semiconductors protocol SCL SDA Fig 21. I 12. Test information Fig 22. Test circuitry for switching times PCA9551_7 Product data sheet 2 8-bit I C-bus LED driver with programmable blink rates START bit 7 condition MSB (S) (A7 SU;STA LOW HIGH BUF ...

Page 18

... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 19

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 20

... NXP Semiconductors HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 21

... NXP Semiconductors 14. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 15. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” ...

Page 22

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 15.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 23

... NXP Semiconductors Fig 26. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 16. Abbreviations Table 16. Acronym CDM DSP DUT ESD GPIO HBM 2 I C-bus LED MCU MM MPU ...

Page 24

... NXP Semiconductors 17. Revision history Table 17. Revision history Document ID Release date PCA9551_7 20070223 • Modifications: removed PCA9551BS3, HVQFN16 (SOT758-1) package offering (affects Table 1 “Ordering PCA9551_6 20061107 PCA9551_5 20041001 (9397 750 13726) PCA9551_4 20030505 (9397 750 11462) PCA9551_3 20030220 (9397 750 11155) ...

Page 25

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 26

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 5 6.3 Register descriptions . . . . . . . . . . . . . . . . . . . . 5 6.3.1 INPUT - Input register 6.3.2 PSC0 - Frequency Prescaler 6.3.3 PWM0 - Pulse Width Modulation ...

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