PMWD18UN NXP Semiconductors, PMWD18UN Datasheet
PMWD18UN
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PMWD18UN Summary of contents
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... PMWD18UN Dual N-channel TrenchMOS ultra low level FET Rev. 03 — 1 July 2005 1. Product profile 1.1 General description Dual common drain N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. 1.2 Features Surface mounting package Very low threshold voltage 1.3 Applications ...
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... 4.5 V; see 100 4.5 V; see pulsed see Figure pulsed Rev. 03 — 1 July 2005 PMWD18UN Min - = [1] Figure 2 and 3 - [1] Figure see Figure [ [1] - ...
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... Product data sheet Dual N-channel TrenchMOS ultra low level FET 03aa17 120 I der (%) 150 200 Fig 2. Normalized continuous drain current Rev. 03 — 1 July 2005 PMWD18UN 100 150 V 4 -------------------- - 100 % der ...
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... Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration 9397 750 14719 Product data sheet Dual N-channel TrenchMOS ultra low level FET Conditions see Figure Rev. 03 — 1 July 2005 PMWD18UN Min Typ Max - - 30 [1] - 100 - 003aaa259 ...
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... MHz see Figure 4 see Figure /dt = 100 Rev. 03 — 1 July 2005 PMWD18UN Min Typ Max 0.45 0 100 - - 100 and 21 ...
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... GS 1.4 1.3 1.2 1.1 0.6 0 (V) DS Fig 6. Transfer characteristics: drain current as a 003aaa262 1.5 (V) = 1.8 GS 2.5 4 (A) D Fig 8. Normalized drain-source on-state resistance Rev. 03 — 1 July 2005 PMWD18UN ( 150 0 and 150 C; V > function of gate-source voltage; typical values ...
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... Fig 10. Sub-threshold drain current as a function of 003aaa263 I S (A) C iss C oss C rss (V) DS Fig 12. Source current as a function of source-drain Rev. 03 — 1 July 2005 PMWD18UN 3 4 min typ max 0.2 0.4 0.6 0 gate-source voltage 150 C ...
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... Fig 13. Gate-source voltage as a function of gate charge; typical values 9397 750 14719 Product data sheet Dual N-channel TrenchMOS ultra low level FET ( Rev. 03 — 1 July 2005 PMWD18UN 003aaa265 30 Q (nC) G © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... 2.5 scale (1) ( 0.30 0.20 3.1 4.5 0.65 0.19 0.13 2.9 4.3 REFERENCES JEDEC JEITA MO-153 Rev. 03 — 1 July 2005 PMWD18UN Dual N-channel TrenchMOS ultra low level FET detail 6.5 0.7 0.94 0.1 0.1 0.1 6.3 0.5 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... Figure 5, 7 and Product data - Product data - Rev. 03 — 1 July 2005 PMWD18UN Supersedes 9397 750 14719 PMWD18UN-02 data revised. tot data revised. SM revised. 12 revised. 9397 750 12706 PMWD18UN-01 9397 750 10832 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — trademark of Koninklijke Philips Electronics N.V. Rev. 03 — 1 July 2005 PMWD18UN © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Disclaimers Trademarks Contact information . . . . . . . . . . . . . . . . . . . . 11 PMWD18UN Dual N-channel TrenchMOS ultra low level FET © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice ...