SC16C554DIB64 NXP Semiconductors, SC16C554DIB64 Datasheet
SC16C554DIB64
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SC16C554DIB64 Summary of contents
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SC16C554/554D Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder Rev. 05 — 10 May 2004 1. Description The SC16C554/554D is a 4-channel Universal Asynchronous Receiver and Transmitter (QUART) used for serial data communications. Its principal function is to convert ...
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... Ordering information Type number Package Name Description SC16C554DIA68 PLCC68 plastic leaded chip carrier; 68 leads SC16C554DIB64 LQFP64 plastic low profile quad flat package; 64 leads; body 10 SC16C554IB64 LQFP64 plastic low profile quad flat package; 64 leads; body 10 SC16C554IB80 LQFP80 plastic low profile quad flat package; 80 leads; body 12 ...
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Philips Semiconductors 4. Block diagram SC16C554/554D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC 16/68 INTA-INTD TXRDY RXRDY INTERRUPT CONTROL LOGIC INTSEL Fig 1. SC16C554/554D block diagram (16 mode). 9397 750 13132 Product data ...
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Philips Semiconductors SC16C554/554D D0–D7 DATA BUS R/W AND RESET CONTROL LOGIC A0–A4 REGISTER CS SELECT LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 2. SC16C554/554D block diagram (68 mode). 9397 750 13132 Product data Quad UART with 16-byte FIFO ...
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Philips Semiconductors 5. Pinning information 5.1 Pinning 5.1.1 PLCC68 DSRA 10 CTSA 11 DTRA RTSA 14 INTA 15 CSA 16 TXA 17 IOW 18 TXB 19 CSB 20 INTB 21 RTSB 22 GND 23 DTRB 24 ...
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Philips Semiconductors DSRA 10 CTSA 11 DTRA RTSA 14 IRQ TXA 17 R/W 18 TXB n.c. 21 RTSB 22 GND 23 DTRB 24 CTSB 25 DSRB 26 Fig 4. PLCC68 ...
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... TXB 10 CSB 11 INTB 12 RTSB 13 GND 14 DTRB 15 CTSB 16 Fig 5. LQFP64 pin configuration. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder SC16C554IB64 SC16C554DIB64 Rev. 05 — 10 May 2004 SC16C554/554D 48 DSRD 47 CTSD 46 DTRD 45 GND 44 RTSD 43 INTD 42 CSD 41 TXD ...
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Philips Semiconductors 5.1.3 LQFP80 handbook, full pagewidth n.c. 1 CDD 2 RID 3 RXD INTSEL n. GND 16 ...
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Philips Semiconductors 5.2 Pin description Table 2: Pin description Pin Symbol PLCC68 LQFP64 LQFP80 16/ A3 CDA, CDB, 9, 27, ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 D0-D2, 66-68, 53-55, 7-9, D3-D7 1-5 56-60 11-15 DSRA, 10, 26, 1, 17, 22, 39, DSRB, 44, 60 32, 48 62, 79 DSRC, DSRD DTRA, 12, 24, 3, ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 IOW IRQ n.c. 21, 49 10, 52, 54, 20, 21, 55, 65 30, 40, 41, 49, 52, 60, 61, 71, ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 RXA, RXB, 7, 29, 62, 20, 17, 44, RXC, RXD 41, 63 29, 51 57, 4 RXRDY TXA, TXB, 17, 19, 8, 10, 29, 32, ...
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Philips Semiconductors 6. Functional description The SC16C554/554D provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...
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Philips Semiconductors 6.1 Interface options Two user interface modes are selectable for the PLCC68 package. These interface modes are designated as the ‘16 mode’ and the ‘68 mode’. This nomenclature corresponds to the early 16C454/554 and 68C454/554 package interfaces respectively. ...
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Philips Semiconductors 6.4 Internal registers The SC16C554/554D provides 17 internal registers for monitoring and control. These registers are shown in (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO control register (FCR), line status and control registers (LCR/LSR), modem status ...
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Philips Semiconductors Table 6: Selected trigger level (characters 6.6 Hardware flow control When automatic hardware flow control is enabled, the SC16C554/554D monitors the CTS pin for a remote buffer overflow indication and controls the RTS pin ...
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Philips Semiconductors characters as soon as received data passes the programmed trigger level. To clear this condition, the SC16C554/554D will transmit the programmed Xon1,2 characters as soon as receive data drops below the programmed trigger level. 6.8 Special feature software ...
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Philips Semiconductors 6.10 Programmable baud rate generator The SC16C554/554D supports high speed modem technologies that have increased input data rates by employing data compression schemes. For example, a 33.6 kbit/s modem that employs data compression may require a 115.2 kbit/s ...
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Philips Semiconductors 6.11 DMA operation The SC16C554/554D FIFO trigger level provides additional flexibility to the user for block mode operation. LSR[5,6] provide an indication when the transmitter is empty or has an empty location(s). The user can optionally operate the ...
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Philips Semiconductors SC16C554/554D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC INTA-INTD INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 8. Internal loop-back mode diagram (16 mode). 9397 750 13132 Product data Quad UART with 16-byte ...
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Philips Semiconductors SC16C554/554D DATA BUS D0–D7 R/W AND RESET CONTROL LOGIC A0–A4 REGISTER CS SELECT LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 9. Internal loop-back mode diagram (68 mode). 9397 750 13132 Product data Quad UART with 16-byte ...
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Philips Semiconductors 7. Register descriptions Table 8 The assigned bit functions are more fully defined in Table 8: SC16C554/554D internal registers Shaded bits are only accessible when EFR[4] is set. [ Register Default [2] General Register Set ...
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Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...
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Philips Semiconductors Table 9: Bit 7.2.1 IER versus Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will ...
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Philips Semiconductors 7.3 FIFO Control Register (FCR) This register is used to enable the FIFOs, clear the FIFOs, set the transmit/receive FIFO trigger levels, and select the DMA mode. 7.3.1 DMA mode Mode 0 (FCR bit 3 = 0): receive ...
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Philips Semiconductors Table 10: Bit Table 11: FCR[ 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder FIFO Control Register bits description Symbol Description Transmit operation in mode ...
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Philips Semiconductors 7.4 Interrupt Status Register (ISR) The SC16C554/554D provides six levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the ISR ...
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Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...
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Philips Semiconductors Table 15: LCR[ Table 16: LCR[ Table 17: LCR[ 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder LCR[5] parity selection ...
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Philips Semiconductors 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 18: Bit 9397 750 13132 Product data Quad UART with 16-byte FIFO ...
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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C554/554D and the CPU. Table 19: Bit 9397 750 13132 Product data Quad UART with 16-byte ...
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Philips Semiconductors Table 19: Bit 0 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C554/554D is connected. Four bits of this register ...
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Philips Semiconductors Table 20: Bit 1 0 [1] Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated. 7.9 Scratchpad Register (SPR) The SC16C554/554D provides a temporary data register to store 8 bits ...
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Philips Semiconductors Table 21: Bit 5 4 3:0 Table 22: Cont [1] When using software flow control the Xon/Xoff characters cannot be used for data transfer. 9397 750 13132 Product ...
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Philips Semiconductors 7.11 SC16C554/554D external reset conditions Table 23: Register IER ISR LCR MCR LSR MSR FCR EFR Table 24: Output TXA, TXB, TXC, TXD RTSA, RTSB, RTSC, RTSD DTRA, DTRB, DTRC, DTRD RXRDY TXRDY 8. Limiting values Table 25: ...
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Table 26: DC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol ...
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Philips Semiconductors 10. Dynamic characteristics Table 27: AC electrical characteristics + 2 5.0 V amb CC Symbol Parameter clock pulse duration oscillator/clock ...
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Philips Semiconductors Table 27: AC electrical characteristics + 2 5.0 V amb CC Symbol Parameter t write cycle delay 32d t data set-up time 33s t data hold ...
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Philips Semiconductors A0–A4 t 30s CS t 32s R/W D0–D7 Fig 11. General write timing in 68 mode. A0– 13d IOW D0–D7 Fig 12. General write timing in 16 mode. 9397 750 13132 Product data Quad ...
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Philips Semiconductors A0– IOR D0–D7 Fig 13. General read timing in 16 mode. IOW ACTIVE RTS CHANGE OF STATE DTR CD CTS DSR INT IOR RI Fig 14. Modem input/output timing. 9397 750 13132 Product ...
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Philips Semiconductors t 2w EXTERNAL CLOCK Fig 15. External clock timing. START BIT RX INT IOR Fig 16. Receive timing. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS ...
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Philips Semiconductors START BIT RX RXRDY IOR Fig 17. Receive ready timing in non-FIFO mode. START BIT RX RXRDY IOR Fig 18. Receive ready timing in FIFO mode. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared ...
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Philips Semiconductors START BIT TX INT t 23d ACTIVE IOW Fig 19. Transmit timing. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS (5– DATA BITS ...
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Philips Semiconductors Fig 20. Transmit ready timing in non-FIFO mode. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder Rev. 05 — 10 May 2004 SC16C554/554D © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #16 t 27d TXRDY Fig 21. Transmit ready timing in FIFO mode (DMA mode ‘1’). 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS ...
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Philips Semiconductors TX DATA IRTXA–IRTXD Fig 22. Infrared transmit timing. IRRXA–IRRXD RX DATA Fig 23. Infrared receive timing. 9397 750 13132 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder UART FRAME DATA BITS ...
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Philips Semiconductors 11. Package outline PLCC68: plastic leaded chip carrier; 68 leads pin 1 index DIMENSIONS (mm dimensions are derived from the original inch dimensions) A ...
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Philips Semiconductors LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...
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Philips Semiconductors LQFP80: plastic low profile quad flat package; 80 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...
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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – ...
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Philips Semiconductors [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C oven. ...
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Philips Semiconductors 13. Revision history Table 29: Revision history Rev Date CPCN Description 05 20040510 - Product data (9397 750 13132). Supersedes data of 19 June 2003 (9397 750 11616). Modifications: • Figure 6 “LQFP80 pin from “D6” to “INTD”. ...
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Philips Semiconductors 14. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . ...