UPD43257BGU-85LL NEC, UPD43257BGU-85LL Datasheet
UPD43257BGU-85LL
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UPD43257BGU-85LL Summary of contents
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... X. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. M10693EJ7V0DS00 (7th edition) ...
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Ordering Information Part number Package PD43257BCZ-70L 28-PIN PLASTIC DIP PD43257BCZ-85L (15.24 mm (600)) PD43257BCZ-70LL PD43257BCZ-85LL PD43257BGU-70L 28-PIN PLASTIC SOP PD43257BGU-85L (11.43 mm (450)) PD43257BGU-70LL PD43257BGU-85LL Note 3 Access time Supply current ...
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Pin Configurations (Marking Side) /xxx indicates active low signal. A14 A12 I/O1 I/O2 I/O3 GND Remark Refer to Package Drawings for the 1-pin marking. 28-PIN PLASTIC DIP (15.24 mm (600)) [ PD43257BCZ-xxL ...
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A14 A12 I/O1 I/O2 I/O3 GND Remark Refer to Package Drawings for the 1-pin marking. 4 28-PIN PLASTIC SOP (11.43 mm (450)) [ PD43257BGU-xxL ] [ PD43257BGU-xxLL ] ...
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Block Diagram A0 Address buffer A14 I/O1 I/O8 /CE1 CE2 / GND Truth Table /CE1 CE2 / Remark : Row Memory cell array decoder 262,144 ...
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Electrical Specifications Absolute Maximum Ratings Parameter Symbol Supply voltage Input / Output voltage Operating ambient temperature Storage temperature Note –3.0 V (MIN.) (Pulse width : 50 ns) Caution Exposing the device to stress above those listed in Absolute Maximum Rating ...
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DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) Parameter Symbol Input leakage current I/O leakage /CE1 = V LO I/O CC current ...
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AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) AC Test Conditions [ PD43257B-70L, PD43257B-85L, PD43257B-70LL, PD43257B-85LL ] Input Waveform (Rise and Fall Time 2.2 V 1.5 V 0.8 V Output Waveform 1.5 V Output Load AC characteristics with notes should ...
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Read Cycle Parameter Symbol Read cycle time Address access time /CE1 access time t CE2 access time t Output hold from address change /CE1 to output in low impedance t CE2 to output in low impedance t /CE1 to output ...
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Write Cycle Parameter Symbol Write cycle time t WC /CE1 to end of write t CW1 CE2 to end of write t CW2 Address valid to end of write t AW Address setup time t Write pulse width t WP ...
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Write Cycle Timing Chart 1 (/WE Controlled) Address (Input) /CE1 (Input) CE2 (Input) t /WE (Input) I/O (Input / Output) Indefinite data out Cautions 1. During address transition, at least one of pins /CE1, CE2, /WE should be inactivated. 2. ...
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Write Cycle Timing Chart 2 (/CE1 Controlled) Address (Input) /CE1 (Input) CE2 (Input) /WE (Input) High impedance I/O (Input) Cautions 1. During address transition, at least one of pins /CE1, CE2, /WE should be inactivated. 2. When I/O pins are ...
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Write Cycle Timing Chart 3 (CE2 Controlled) Address (Input) /CE1 (Input) CE2 (Input) /WE (Input) High impedance I/O (Input) Cautions 1. During address transition, at least one of pins /CE1, CE2, /WE should be inactivated. 2. When I/O pins are ...
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Low V Data Retention Characteristics (T CC Parameter Symbol Data retention V /CE1 CCDR1 supply voltage CE2 V CE2 CCDR2 Data retention I V CCDR1 CC supply current CE2 I V CCDR2 CC t Chip deselection CDR to data retention ...
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Data Retention Timing Chart (1) /CE1 Controlled t CDR V CC 4.5 V /CE1 V (MIN (MIN.) CCDR V (MAX.) IL GND Remark On the data retention mode by controlling /CE1, the input level of CE2 must be ...
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Package Drawings 28-PIN PLASTIC DIP (15.24 mm (600 NOTES 1. Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 2. Item "K" to ...
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PLASTIC SOP (11.43 mm (450 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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Recommended Soldering Conditions The following conditions must be met when soldering “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (C10535E). Please consult with our sales offices in case other soldering process is used case soldering is done under different conditions. Types ...
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... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...
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... NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others ...