MBM29F080A-70PTN SPANSION, MBM29F080A-70PTN Datasheet

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MBM29F080A-70PTN

Manufacturer Part Number
MBM29F080A-70PTN
Description
Manufacturer
SPANSION
Datasheet

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SPANSION Flash Memory
TM
Data Sheet
September 2003
TM
This document specifies SPANSION
memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
TM
There is no change to this datasheet as a result of offering the device as a SPANSION
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
TM
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
memory
solutions.

Related parts for MBM29F080A-70PTN

MBM29F080A-70PTN Summary of contents

Page 1

... Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu. Continuity of Specifications There is no change to this datasheet as a result of offering the device as a SPANSION revisions will occur when appropriate, and changes will be noted in a revision summary. Continuity of Ordering Part Numbers AMD and Fujitsu continue to support existing part numbers beginning with " ...

Page 2

... MBM29F080A GENERAL DESCRIPTION The MBM29F080A M-bit, 5.0 V-Only Flash memory organized bytes of 8 bits each. The 1 M bytes of data is divided into 16 sectors bytes for flexible erase capability. The 8 bit of data will appear The MBM29F080A is offered in a 48-pin TSOP(I), 40-pin TSOP , and 44-pin SOP packages. This device 7 is designed to be programmed in-system with the standard system 5 ...

Page 3

... The MBM29F080A also has a hardware RESET pin. When this pin is driven low, execution of any Embedded Program or Embedded Erase operations will be terminated. The internal state machine will then be reset into the read mode. The RESET pin may be tied to the system reset circuity. Therefore system reset occurs during the Embedded Program or Embedded Erase operation, the device will be automatically reset to a read mode ...

Page 4

... Temporary sector groups unprotection Temporary sector unprotection via the RESET pin PACKAGES 48-pin plastic TSOP(1) Marking Side (FPT-48P-M19) 40-pin plastic TSOP(1) Marking Side (FPT-40P-M06) MBM29F080A 48-pin plastic TSOP(1) Marking Side (FPT-48P-M20) 40-pin plastic TSOP(1) Marking Side (FPT-40P-M07) 44-pin plastic SOP (FPT-44P-M16) ...

Page 5

... Side MBM29F080A 37 Normal Bend FPT-48P-M19 25 26 (Marking Side MBM29F080A 36 Reverse Bend FPT-48P-M20 N.C. N.C. N.C. N. RY/ ...

Page 6

... FPT-40P-M07 Pin Name RY/BY RESET N. MBM29F080A 40 N. RY/ ...

Page 7

... MBM29F080A -55/-70/-90 LOGIC SYMBOL BLOCK DIAGRAM V RY/ Buffer SS WE State Control RESET Command Register CE OE Low V Detector RESET RY/BY RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB ...

Page 8

... Manufacturer and device codes may also be accessed via a command register write sequence. Refer to “MBM29F080A Command Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE” Refer to the section on Sector Group Protection can ...

Page 9

... MBM29F080A -55/-70/- SA0 0 SA1 0 SA2 0 SA3 0 SA4 0 SA5 0 SA6 0 SA7 0 SA8 1 SA9 1 SA10 1 SA11 1 SA12 1 SA13 1 SA14 1 SA15 SGA0 0 SGA1 0 SGA2 0 SGA3 0 SGA4 1 SGA5 1 SGA6 1 SGA7 1 8 Sector Address Table ...

Page 10

... Address bits Sector Address (SA). Bus operations are defined in “MBM29F080A User Bus Operations Table” in “ FLEXIBLE SECTOR- ERASE ARCHITECTURE”. RA Address of the memory location to be read. PA Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE pulse ...

Page 11

... MBM29F080A -55/-70/-90 • Thirty two 64 K byte sectors • 8 sector groups each of which consists of 2 adjacent sectors in the following pattern; sectors 0-1, 2-3, 4-5, 6-7, 8-9, 10-11, 12-13, and 14-15 • Individual-sector or multiple-sector erase capability • Sector group protection is user-definable 10 0FFFFFh 64 K byte SA15 0EFFFFh 64 K byte SA14 0DFFFFh 0CFFFFh ...

Page 12

... FUNCTIONAL DESCRIPTION Read Mode The MBM29F080A has two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...

Page 13

... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F080A features hardware sector group protection. This feature will disable both program and erase operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-1, 2-3, 4-5, 6-7, 8-9, 10-11, 12-13, and 14-15 (see “ ...

Page 14

... The operation is initiated by writing the autoselect command sequence into the command register. Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read cycle from address XX01h returns the device code D5h. (See “MBM29F080A Sector Protection Verify Autoselect Codes Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”). ...

Page 15

... WE. After time-out from the rising edge of the last sector erase command, the sector erase operation will begin. Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29F080A Command Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”. This sequence is followed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently erased ...

Page 16

... To resume the operation of Sector Erase, the Resume command (30h) should be written. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has resumed erasing. MBM29F080A is “1” (see Write Operation Status section) 7 will stop toggling ...

Page 17

... DQ 7 Data Polling The MBM29F080A device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...

Page 18

... DQ 6 Toggle Bit I The MBM29F080A also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...

Page 19

... RY/BY Ready/Busy The MBM29F080A provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...

Page 20

... Flash memory. Data Protection The MBM29F080A is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...

Page 21

... MBM29F080A-55 V Supply Voltages * CC MBM29F080A-70/- Voltage is defined on the basis of V Note : Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...

Page 22

... MAXIMUM OVERSHOOT / MAXIMUM UNDERSHOOT 1. Maximum Undershoot Waveform +0.8 V –0.5 V –2 Maximum Overshoot Waveform Maximum Overshoot Waveform 2 +14.0 V +13 +0 Note : This waveform is applied for A MBM29F080A and RESET. 9 -55/-70/-90 21 ...

Page 23

... MBM29F080A -55/-70/-90 DC CHARACTERISTICS Parameter Input Leakage Current Output Leakage Current A , OE, RESET Inputs Leakage 9 Current V Active Current * Active Current * Current (Standby Current (Standby, Reset) CC Input Low Level Input High Level Voltage for Autoselect and Sector Protection (A , OE, RESET ...

Page 24

... Test Conditions: Output Load: 1 TTL gate and 30 pF Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes : MBM29F080A-55: C MBM29F080A-70/-90: C MBM29F080A Symbol -55 * Test Setup JEDEC Standard Min Max Min Max t t — ...

Page 25

... Setup Time CC Rise Time Voltage Transition Time * 2 2 Write Pulse Width * 2 OE Setup Time to WE Active * CE Setup Time to WE Active * 2 Recover Time from RY/BY 24 Symbol MBM29F080A -55 JEDEC Standard Min Typ Max Min Typ Max Min Typ Max — — 70 AVAV — ...

Page 26

... OUT OUT IN2 IN Symbol Test Setup OUT OUT IN2 IN -55/-70/-90 MBM29F080A -70 -90 Unit Typ Max 500 — — 500 — — 50 — — 50 — — — — 70 — — 90 — — 30 — — 40 Unit ...

Page 27

... MBM29F080A -55/-70/-90 TIMING DIAGRAM • Key to Switching Waveforms (1) AC Waveforms for Read Operations Address WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 28

... PD is data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. OUT Figure indicates last two bus cycles of four bus cycle sequence. MBM29F080A t RC Address Stable t ACC Output Valid Data Polling ...

Page 29

... MBM29F080A -55/-70/-90 (4) AC Waveforms for Alternate CE Controlled Program Operations Address Data 5.0 V Notes : PA is address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 30

... SA is the sector address for Sector Erase. Addresses = 555h for Chip Erase. (6) AC Waveforms for Data Polling during Embedded Algorithm Operations Data Data Valid Data (The device has completed the Embedded operation.) 7 MBM29F080A 2AAh 555h 555h WPH t DH 55h 80h AAh ...

Page 31

... MBM29F080A -55/-70/-90 (7) AC Waveforms for Toggle Bit I during Embedded Algorithm Operations CE t OEH WE t OES OE Data stops toggling (The device has completed the Embedded operation.) 6 (8) RY/BY Timing Diagram During Program/Erase Operations CE WE RY/BY (9) RESET, RY/BY Timing Diagram WE RESET RY/ Toggle DQ = Toggle 6 6 Stop Toggling ...

Page 32

... Address SGAx VLHT VLHT WE CE Data t VCS V CC SGAx Sector Group Address for initial sector SGAy Sector Group Address for next sector MBM29F080A VLHT OESP WPP t CSP -55/-70/-90 SGAy t VLHT 01h ...

Page 33

... MBM29F080A -55/-70/-90 (11) Temporary Sector Group Unprotection Timing Diagram RESET CE WE RY/BY (12 Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Toggle DQ and with read from the erase-suspended sector VCS t VIDR Program or Erase Command Sequence ...

Page 34

... FLOW CHART (1) Embedded Program TM Algorithm EMBEDDED ALGORITHMS Increment Address MBM29F080A Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): 555h/AAh 2AAh/55h 555h/A0h Program Address/Program Data -55/-70/-90 33 ...

Page 35

... MBM29F080A -55/-70/-90 (2) Embedded Erase™ Algorithm Chip Erase Command Sequence (Address/Command): Note : To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. ...

Page 36

... Data Polling Algorithm Read Byte (DQ Addr Read Byte (DQ Addr Note : DQ is rechecked even MBM29F080A Start VA = Address for programming Any of the sector addresses 0 7 Yes = Data Any of the sector group Yes Yes = Data ...

Page 37

... MBM29F080A -55/-70/-90 (4) Toggle Bit I Algorithm *1 : Read toggle bit twice to determine whether it is toggling rechecked even changing to “1”. 36 Start Read ( Addr. = “H” or “L” *1 Read ( Addr. = “H” or “L” Toggle 6 ? Yes ...

Page 38

... Sector Group Protection Algorithm Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed MBM29F080A Start Setup Sector Group Addr PLSCNT = RESET = Activate WE Pulse Time out 100 IH, ...

Page 39

... MBM29F080A -55/-70/-90 (6) Temporary Sector Group Unprotection Algorithm *1 : All Protected sector groups unprotected All previously protected sector groups are protected once again. 38 Start * RESET = Perform Erase or Program Operations RESET = V IH Temporary Sector Group * Unprotection Completed 2 ...

Page 40

... ORDERING INFORMATION MBM29F080A -55 PFTN DEVICE NUMBER/DESCRIPTION MBM29F080A 8 Mega-bit (1 M 5.0 V-only Read, Write, and Erase 64 K Byte (16 Sectors) Part No. MBM29F080A-55PTN 40-pin plastic TSOP(1) MBM29F080A-70PTN MBM29F080A-90PTN MBM29F080A-55PTR 40-pin plastic TSOP(1) MBM29F080A-70PTR MBM29F080A-90PTR MBM29F080A-55PFTN 48-pin plastic TSOP(1) MBM29F080A-70PFTN MBM29F080A-90PFTN MBM29F080A-55PFTR 48-pin plastic TSOP(1) MBM29F080A-70PFTR ...

Page 41

... MBM29F080A -55/-70/-90 PACKAGE DIMENSIONS 40-pin plastic TSOP (1) (FPT-40P-M06) LEAD No. 1 INDEX 20 +0.03 0.17 – 0.08 +.001 .007 – .003 "A" 2003 FUJITSU LIMITED F40007S-c-3-4 C 40-pin plastic TSOP (1) (FPT-40P-M07) LEAD No +0.03 0.17 – 0.08 +.001 .007 – .003 "A" 2003 FUJITSU LIMITED F40008S-c-3 Note Resin protrusion. (Each side : 0.15 (.006) Max) . ...

Page 42

... Note 3) Pins width do not include tie bar cutting remainder. LEAD No. 1 INDEX 24 0.10(.004) "A" * 18.40 ± (.724 ± 20.00 ± (.787 ± 2003 FUJITSU LIMITED F48030S-c-6-7 C MBM29F080A Resin protrusion and gate protrusion are 0.15 (.006) Max (each side Details of "A" part 0~8 ˚ 0.60 ± 0.15 (.024 ± .006) 25 ± 0.20 * 12.00 ± ...

Page 43

... MBM29F080A -55/-70/-90 (Continued) 44-pin plastic SOP (FPT-44P-M16) +0. 28.45 –0.20 44 INDEX 1 1.27(.050) 2002 FUJITSU LIMITED F44023S-c-6 Note These dimensions include resin protrusion. Note These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. ...

Page 44

... MBM29F080A -55/-70/-90 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device ...

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