BC41B143A05-IRK-E4 ETC ETC, BC41B143A05-IRK-E4 Datasheet

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BC41B143A05-IRK-E4

Manufacturer Part Number
BC41B143A05-IRK-E4
Description
BC41B143A05-IRK-E4BlueCpre 4-ROM Single Chip Bluetooth v2.0 System with EDR
Manufacturer
ETC ETC
Datasheet

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BC41B143A05-IRK-E4
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Device Features
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General Description
_äìÉ`çêÉQJolj is a single chip radio and
baseband IC for Bluetooth 2.4GHz systems
including enhanced data rates (EDR) to 3Mbps.
With the on-chip CSR Bluetooth software stack it
provides a fully compliant Bluetooth system to v2.0
of the specification for data and voice
communications.
BC41B143A-db-001Pe
RF OUT
Fully Qualified Bluetooth v2.0 system
Enhanced Data Rate (EDR) compliant with
v2.0.E.2 of specification for both 2Mbps and
3Mbps modulation modes
Full Speed Bluetooth Operation with Full
Piconet Support
Scatternet Support
1.8V core, 1.7 to 3.6V I/O split rails
Low Power 1.8V Operation
Small footprint 6 x 6mm 84-ball VFBGA
Package
Minimal External Components Required
Integrated 1.8V regulator
USB and Dual UART Ports to 3MBaud
Support for 802.11 Coexistence
RoHS Compliant
RF IN
BlueCore4-ROM System Architecture
Radio
GHz
2.4
Baseband
RAM
ROM
MCU
XTAL
DSP
I/O
This material is subject to CSR’s non-disclosure agreement
UART/USB
PCM
PIO
SPI
© Cambridge Silicon Radio Limited 2005
Production Information
Applications
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BlueCore4-ROM has been designed to reduce the number
of external components required which ensures that
production costs are minimised.
The device incorporates auto-calibration and built-in
self-test (BIST) routines to simplify development, type
approval and production test. All hardware and device
firmware is fully compliant with the Bluetooth v2.0
Specification (all mandatory and optional features).
To improve the performance of both Bluetooth and
802.11b/g co-located systems a wide range of
co-existence features are available including a variety of
hardware signalling: basic activity signalling and Intel
WCS activity and channel signalling.
Cellular Handsets
Personal Digital Assistants
Digital cameras and other high volume consumer
products
Single Chip Bluetooth
_äìÉ`çêÉ
Production Data Sheet for
®
»
v2.0 System
QJolj
Page 1 of 102
with EDR
BC41B143A
July 2005

Related parts for BC41B143A05-IRK-E4

BC41B143A05-IRK-E4 Summary of contents

Page 1

Device Features ! Fully Qualified Bluetooth v2.0 system ! Enhanced Data Rate (EDR) compliant with v2.0.E.2 of specification for both 2Mbps and 3Mbps modulation modes ! Full Speed Bluetooth Operation with Full Piconet Support ! Scatternet Support ! 1.8V core, ...

Page 2

Contents Status Information ................................................................................................................................................ 7 1 Key Features .................................................................................................................................................. 6mm VFBGA Package Information ......................................................................................................... 9 2.1 BlueCore4-ROM Pinout Diagram ............................................................................................................ 9 2.2 Device Terminal Functions .................................................................................................................... 10 3 Electrical Characteristics ............................................................................................................................ 13 3.1 Power Consumption .............................................................................................................................. ...

Page 3

Memory Management Unit ......................................................................................................... 39 7.6.2 Burst Mode Controller ................................................................................................................ 39 7.6.3 Physical Layer Hardware Engine DSP....................................................................................... 39 7.6.4 RAM ........................................................................................................................................... 39 7.6.5 ROM........................................................................................................................................... 39 7.6.6 USB............................................................................................................................................ 40 7.6.7 Synchronous Serial Interface ..................................................................................................... 40 7.6.8 UART ......................................................................................................................................... 40 7.6.9 ...

Page 4

Detach and Wake-Up Signalling ................................................................................................ 69 10.5.8 USB Driver ................................................................................................................................. 69 10.5.9 USB 1.1 Compliance.................................................................................................................. 70 10.5.10 USB 2.0 Compatibility........................................................................................................... 70 10.6 Serial Peripheral Interface ..................................................................................................................... 70 10.6.1 Instruction Cycle......................................................................................................................... 70 10.6.2 Writing to BlueCore4-ROM ........................................................................................................ 71 10.6.3 Reading ...

Page 5

List of Figures Figure 2.1: BlueCore4-ROM Device Pinout ............................................................................................................ 9 Figure 6.1: BlueCore4-ROM Device Diagram ....................................................................................................... 37 Figure 8.1: BlueCore HCI Stack ............................................................................................................................ 41 Figure 8.2: BlueCore RFCOMM Stack .................................................................................................................. 44 Figure 8.3: Virtual Machine ................................................................................................................................... 46 Figure 9.1: Basic ...

Page 6

Figure 17.3: Reel Dimensions ............................................................................................................................... 95 Figure 17.4: Tape and Reel Packaging................................................................................................................. 96 Figure 17.5: Product Information Labels ............................................................................................................... 97 List of Tables Table 9.1: Data Rate Schemes ............................................................................................................................. 48 Table 9.2: 2-Bits Determine Phase Shift Between Consecutive Symbols ............................................................. ...

Page 7

Status Information The status of this Data Sheet is Production Information. CSR Product Data Sheets progress according to the following format: Advance Information Information for designers concerning CSR product in development. All values specified are the target values of the ...

Page 8

Key Features Radio ! Common TX/RX terminal simplifies external matching; eliminates external antenna switch ! BIST minimises production test time. No external trimming is required in production ! Full RF reference designs available ! Bluetooth v2.0 Specification compliant ! ...

Page 9

VFBGA Package Information 2.1 BlueCore4-ROM Pinout Diagram ...

Page 10

Device Terminal Functions Radio Ball Pad Type RF_IN D1 Analogue Bi-directional with PIO[0]/RXEN B1 programmable strength internal pull-up/down Bi-directional with PIO[1]/TXEN B2 programmable strength internal pull-up/down TX_A F1 Analogue TX_B E1 Analogue AUX_DAC D3 Analogue Synthesiser and Ball Pad ...

Page 11

Test and Debug Ball Pad Type CMOS input with weak RESET C7 internal pull-down CMOS input with weak RESETB D8 internal pull-up CMOS input with weak SPI_CSB C9 internal pull-up CMOS input with weak SPI_CLK C10 internal-pull-down CMOS input with ...

Page 12

Power Supplies and Ball Control VREG_IN K6 VREG_EN K5 VDD_USB K9 VDD_PIO A3 VDD_PADS D10 VDD_CORE E10 VDD_RADIO C1, C2 VDD_VCO H1 VDD_ANA K4 A1, A2, VSS_PADS D9, J9, K10 VSS_CORE E9 VSS_RADIO D2, E2, F2 VSS_VCO G1, G2 VSS_ANA ...

Page 13

Electrical Characteristics Absolute Maximum Ratings Rating Storage Temperature Supply Voltage: VDD_RADIO, VDD_LO, VDD_ANA and VDD_CORE Supply Voltage: VDD_PADS, VDD_PIO and VDD_USB Supply Voltage: VREG_IN Other Terminal Voltages Recommended Operating Conditions Operating Condition Operating Temperature Range (1) Guaranteed RF performance ...

Page 14

Input/Output Terminal Characteristics Linear Regulator Normal Operation Output Voltage (Iload = 70 mA) Temperature Coefficient (1)(2) Output Noise Load Regulation (Iload < 100 mA) (1)(3) Settling Time Maximum Output Current Minimum Load Current Input Voltage Dropout Voltage (Iload = 70 ...

Page 15

Input/Output Terminal Characteristics (Continued) Digital Terminals Input Voltage Levels V input logic level low 2.7V ≤ VDD ≤ 3.0V IL 1.7V ≤ VDD ≤ 1.9V V input logic level high IH Output Voltage Levels V output logic level low, OL ...

Page 16

Input/Output Terminal Characteristics (Continued) Power-on reset VDD_CORE falling threshold VDD_CORE rising threshold Hysteresis Input/Output Terminal Characteristics (Continued) Auxiliary ADC Resolution Input voltage range (LSB size = VDD_ANA/255) Accuracy INL (Guaranteed monotonic) DNL Offset Gain Error Input Bandwidth Conversion time (2) ...

Page 17

Input/Output Terminal Characteristics (Continued) Crystal Oscillator (4) Crystal frequency (5) Digital trim range (5) Trim step size Transconductance (6) Negative resistance External Clock (7) Input frequency (8) Clock input level Allowable Jitter XTAL_IN input impedance XTAL_IN input capacitance Notes: VDD_CORE, ...

Page 18

Power Consumption Operation Mode Page scan Inquiry & page scan ACL data transfer No traffic ACL data transfer With file transfer ACL data transfer No traffic ACL data transfer With file transfer ACL data transfer 40ms sniff ACL data ...

Page 19

Radio Characteristics – Basic Data Rate BlueCore4-ROM meets the Bluetooth specification v2.0 + EDR when used in a suitable application circuit between -40°C and +105°C. TX output is guaranteed to be unconditionally stable over the guaranteed temperature range. 4.1 ...

Page 20

Radio Characteristics VDD = 1.8V Frequency (GHz) 0.869 – 0.894 0.869 – 0.894 Emitted power in 0.925 – 0.960 cellular bands 1.570 – 1.580 measured at the unbalanced port of the balun. 1.805 – 1.880 Output power = 1.930 – ...

Page 21

Receiver Radio Characteristics VDD = 1.8V 2.402 Sensitivity at 0.1% BER for all 2.441 packet types 2.480 Maximum received signal at 0.1% BER Continuous power required to block Bluetooth reception (for sensitivity of -67dBm with 0.1% BER) measured at ...

Page 22

Radio Characteristics VDD = 1.8V Frequency (GHz) 0.824 – 0.849 Continuous power in cellular bands 0.824 – 0.849 required to block 0.880 – 0.915 Bluetooth reception (for sensitivity of -67dBm with 0.1% 1.710 – 1.785 BER) measured at the unbalanced ...

Page 23

Temperature -40°C 4.2.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power RF power control range RF power range control resolution 20dB bandwidth for modulated carrier Adjacent channel transmit power F=F Adjacent channel transmit power F=F Δf1avg ...

Page 24

Temperature -25°C 4.3.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power RF power control range RF power range control resolution 20dB bandwidth for modulated carrier Adjacent channel transmit power F=F Adjacent channel transmit power F=F Δf1avg ...

Page 25

Temperature +85°C 4.4.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power RF power control range RF power range control resolution 20dB bandwidth for modulated carrier Adjacent channel transmit power F=F Adjacent channel transmit power F=F Δf1avg ...

Page 26

Temperature +105°C 4.5.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power RF power control range RF power range control resolution 20dB bandwidth for modulated carrier Adjacent channel transmit power F=F Adjacent channel transmit power F=F Δf1avg ...

Page 27

Radio Characteristics – Enhanced Data Rate 5.1 Temperature +20°C 5.1.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power (3) Relative transmit power π/4 DQPSK (3) Max carrier frequency stability w 0 π/4 DQPSK (3) Max carrier ...

Page 28

Class 2 RF transmit power range, Bluetooth v2.0 + EDR specification. (3) Measurements methods are in accordance with the EDR RF Test Specification v2.0.E.2. (4) Modulation accuracy utilises differential error vector magnitude (DEVM) with tracking of the carrier frequency ...

Page 29

Temperature -40°C 5.2.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power (3) Relative transmit power π/4 DQPSK (3) Max carrier frequency stability w 0 π/4 DQPSK (3) Max carrier frequency stability w i π/4 DQPSK (3) ...

Page 30

Modulation accuracy utilises differential error vector magnitude (DEVM) with tracking of the carrier frequency drift. (5) The Bluetooth specification values are for 8DPSK modulation three exceptions are allowed in the Bluetooth v2.0 + EDR specification. BlueCore4 is ...

Page 31

Temperature -25°C 5.3.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power (3) Relative transmit power π/4 DQPSK (3) Max carrier frequency stability w 0 π/4 DQPSK (3) Max carrier frequency stability w i π/4 DQPSK (3) ...

Page 32

Modulation accuracy utilises differential error vector magnitude (DEVM) with tracking of the carrier frequency drift. (5) The Bluetooth specification values are for 8DPSK modulation three exceptions are allowed in the Bluetooth v2.0 + EDR specification. BlueCore4 is ...

Page 33

Temperature +85°C 5.4.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power (3) Relative transmit power π/4 DQPSK (3) Max carrier frequency stability w 0 π/4 DQPSK (3) Max carrier frequency stability w i π/4 DQPSK (3) ...

Page 34

The Bluetooth specification values are for 8DPSK modulation three exceptions are allowed in the Bluetooth v2.0 + EDR specification. BlueCore4 is guaranteed to meet the ACP performance as specified by the Bluetooth v2.0 + EDR specification. 5.4.2 ...

Page 35

Temperature +105°C 5.5.1 Transmitter Radio Characteristics VDD = 1.8V (1) Maximum RF transmit power (3) Relative transmit power π/4 DQPSK (3) Max carrier frequency stability w 0 π/4 DQPSK (3) Max carrier frequency stability w i π/4 DQPSK (3) ...

Page 36

Modulation accuracy utilises differential error vector magnitude (DEVM) with tracking of the carrier frequency drift. (5) The Bluetooth specification values are for 8DPSK modulation three exceptions are allowed in the Bluetooth v2.0 + EDR specification. BlueCore4 is ...

Page 37

Device Diagram VDD_ USB TEST _ EN RESET RESETB VDD_ PADS VDD_ CORE VDD _ RADIO XTAL_ OUT XTAL_ IN Figure 6.1: BlueCore4-ROM Device Diagram This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe Power Control and Regulation VREG ...

Page 38

Description of Functional Blocks 7.1 RF Receiver The receiver features a near-zero Intermediate Frequency (IF) architecture that allows the channel filters to be integrated on to the die. Sufficient out-of-band blocking specification at the Low Noise Amplifier (LNA) input ...

Page 39

Clock Input and Generation The reference clock for the system is generated from a TCXO or crystal input between 8 and 40MHz. All internal reference clocks are generated using a phase locked loop, which is locked to the external ...

Page 40

USB This is a full speed Universal Serial Bus (USB) interface for communicating with other compatible digital devices. BlueCore4-ROM acts as a USB peripheral, responding to requests from a Master host controller such as a PC. 7.6.7 Synchronous Serial ...

Page 41

CSR Bluetooth Software Stacks BlueCore4-ROM is supplied with Bluetooth v2.0 compliant stack firmware, which runs on the internal RISC microcontroller. The BlueCore4-ROM software architecture allows Bluetooth processing and the application program to be shared in different ways between the ...

Page 42

Key Features of the HCI Stack – Standard Bluetooth Functionality Bluetooth v2.0 Mandatory Functionality: ! Adaptive frequency hopping (AFH), including Packet Loss Rate (PLR) and RSSI classification. ! Faster connections ! Flow and flush timeout ! LMP improvements ! ...

Page 43

The firmware’s supported Bluetooth features are detailed in the standard Protocol Implementation Conformance Statement (PICS) documents, available from Note: (1) Supports basic data rate up to 723.2kbps asymmetric, maximum allowed by Bluetooth v2.0 + EDR specification (2) BlueCore4-Audio ROM supports ...

Page 44

Co-operative existence with 802.11b/g chipsets. The device can be optionally configured to support a number of different co-existence schemes including: ! TDMA – Bluetooth and WLAN avoid transmitting at the same time. ! FDMA – Bluetooth avoids transmitting within ...

Page 45

Key Features of the BlueCore4-ROM RFCOMM Stack Interfaces to Host: ! RFCOMM, an RS-232 serial cable emulation protocol ! SDP, a service database look-up protocol Connectivity: ! Maximum number of active slaves Maximum number of simultaneous active ...

Page 46

BlueCore Virtual Machine Stack USB Host (Optional) UART In Figure 8.3, this version of the stack firmware shown requires no host processor (but can use a host processor for debugging etc.). All software layers, including application software, run on ...

Page 47

BCHS Software BlueCore Embedded Host Software is designed to enable CSR customers to implement Bluetooth functionality into embedded products quickly, cheaply and with low risk. BCHS is developed to work with CSR’s family of BlueCore IC’s. BCHS is intended ...

Page 48

Enhanced Data Rate Enhanced Data Rate (EDR) has been introduced to provide 2x and 3x higher layers of the Bluetooth stack. BlueCore4-ROM supports both of the new data rates and is compliant with the Bluetooth v2.0 + EDR specification. ...

Page 49

Figure 9.2: π/4 DQPSK Constellation Pattern Bit Pattern Table 9.2: 2-Bits Determine Phase Shift Between Consecutive Symbols 9.3 Enhanced Data Rate 8DPSK The 3x data rate modulation uses eight phase differential phase shift keying (8DPSK). Each ...

Page 50

Figure 9.3: 8DPSK Constellation Pattern Bit Pattern 000 001 011 010 110 111 101 100 Table 9.3: 3-Bits Determine Phase Shift Between Consecutive Symbols This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe 011 001 100 101 ...

Page 51

Device Terminal Descriptions 10.1 RF Ports The BlueCore4-ROM RF_IN terminal can be configured as either a single ended or differential input. The operational mode is determined by the setting the PS Key PSKEY_TXRX_PIO_CONTROL (0x20). 10.1.1 TX_A and TX_B TX_A ...

Page 52

Single-Ended Input (RF_IN) This is the single ended RF input from the antenna. The input presents a complex impedance that requires a matching network between the terminal and the antenna. Starting from the substrate (chip) side, the input can ...

Page 53

TX Power t Modulation Figure 10.3: Internal Power Ramping The persistent store key (PS Key) PSKEY_TX_GAINRAMP (0x1d), is used to control the delay (in units of μs) between the end of the transmit power ramp and the start of modulation. ...

Page 54

External Reference Clock Input (XTAL_IN) The BlueCore4-ROM RF local oscillator and internal digital clocks are derived from the reference clock at the BlueCore4-ROM XTAL_IN input. This reference may be either an external clock or from a crystal connected between ...

Page 55

Clock Start-Up Delay BlueCore4-ROM hardware incorporates an automatic 5ms delay after the assertion of the system clock request signal before running firmware. This is suitable for most applications using an external clock source. However, there may be scenarios where ...

Page 56

Input Frequencies and PS Key Settings BlueCore4-ROM should be configured to operate with the chosen reference frequency. This is accomplished by setting the PS Key PSKEY_ANA_FREQ (0x1fe) for all frequencies with an integer multiple of 250kHz. The input frequency ...

Page 57

Crystal Oscillator (XTAL_IN, XTAL_OUT) The BlueCore4-ROM RF local oscillator and internal digital clocks are derived from the reference clock at the BlueCore4-ROM XTAL_IN input. This reference may be either an external clock or from a crystal connected between XTAL_IN ...

Page 58

Load Capacitance For resonance at the correct frequency the crystal should be loaded with its specified load capacitance, which is defined for the crystal. This is the total capacitance across the crystal viewed from its terminals. BlueCore4-ROM provides some ...

Page 59

Transconductance Driver Model The crystal and its load capacitors should be viewed as a transimpedance element, whereby a current applied to one terminal generates a voltage at the other. The transconductance amplifier in BlueCore4-ROM uses the voltage at its ...

Page 60

Crystal Oscillator Characteristics Crystal Load Capacitance and Series Resistance Limits with Crystal Frequency 1000.0 100.0 10.0 2.5 3.5 4.5 8 MHz 12 MHz 20 MHz 24 MHz 32 MHz Figure 10.8: Crystal Load Capacitance and Series Resistance Limits with ...

Page 61

Gm Typical Gm Minimum Gm Maximum Figure 10.9: Crystal Driver Transconductance vs. Driver Level Register Setting Note: Drive level is set by Persistent Store Key PSKEY_XTAL_LVL (0x241). ...

Page 62

Typical Minimum Maximum Figure 10.10: Crystal Driver Negative Resistance as a Function of Drive Level Setting Crystal parameters: Crystal frequency 16MHz (Please refer to your software build release note for frequencies supported); ...

Page 63

UART Interface BlueCore4-ROM Universal Asynchronous Receiver Transmitter (UART) interface provides a simple mechanism for communicating with other serial devices using the RS232 standard Figure 10.11: Universal Asynchronous Receiver Four signals are used to implement the UART function, as shown ...

Page 64

The UART interface is capable of resetting BlueCore4-ROM upon reception of a break signal. A Break is identified by a continuous logic low (0V) on the UART_RX terminal, as shown in Figure 10.12 than the value, defined by ...

Page 65

UART Bypass RXD CTS RTS TXD Host Processor Test Interface Figure 10.13: UART Bypass Architecture 10.4.2 UART Configuration While RESET is Active The UART interface for BlueCore4-ROM while the chip is being held in reset is tri-state. This will ...

Page 66

USB Interface BlueCore4-ROM USB devices contain a full speed (12Mbits/s) USB interface that is capable of driving a USB cable directly. No external USB transceiver is required. The device operates as a USB peripheral, responding to requests from a ...

Page 67

Self Powered Mode In self powered mode, the circuit is powered from its own power supply and not from the VBUS (5V) line of the USB cable. It draws only a small leakage current (below 0.5mA) from VBUS on ...

Page 68

Bus Powered Mode In bus powered mode the application circuit draws its current from the 5V VBUS supply on the USB cable. BlueCore4-ROM negotiates with the PC during the USB enumeration stage about how much current it is allowed ...

Page 69

Suspend Current All USB devices must permit the USB controller to place them in a USB Suspend mode. While in USB Suspend, bus powered devices must not draw more than 0.5mA from USB VBUS (self powered devices may draw ...

Page 70

USB 1.1 Compliance BlueCore4-ROM is qualified to the USB specification v1.1, details of which are available from The specification contains valuable information on aspects such as PCB track impedance, supply inrush current and product labelling. Although BlueCore4-ROM meets the ...

Page 71

Writing to BlueCore4-ROM To write to BlueCore4-ROM, the 8-bit write command (00000010) is sent first (C[7:0]) followed by a 16-bit address (A[15:0]). The next 16-bits (D[15:0]) clocked in on SPI_MOSI are written to the location set by the address ...

Page 72

Audio PCM Interface Pulse Code Modulation (PCM standard method used to digitise audio (particularly voice) patterns for transmission over digital communication channels. Through its PCM interface, BlueCore4-ROM has hardware support for continual transmission and reception of PCM ...

Page 73

PCM Interface Master/Slave When configured as the Master of the PCM interface, BlueCore4-ROM generates PCM_CLK and PCM_SYNC. BlueCore4-ROM Figure 10.19: BlueCore4-ROM as PCM Interface Master When configured as the Slave of the PCM interface, BlueCore4-ROM accepts PCM_CLK rates up ...

Page 74

Long Frame Sync Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM ...

Page 75

Multi Slot Operation More than one SCO connection over the PCM interface is supported using multiple slots three SCO connections can be carried over any of the first four slots. LONG_PCM_SYNC Or SHORT_PCM_SYNC PCM_CLK PCM_OUT 1 PCM_IN ...

Page 76

Slots and Sample Formats BlueCore4-ROM can receive and transmit on any selection of the first four slots following each sync pulse. Slot durations can be either clock cycles. Duration’ clock cycles may only be ...

Page 77

PCM Timing Information Symbol Parameter f PCM_CLK frequency mclk - PCM_SYNC frequency (1) t PCM_CLK high mclkh (1) t PCM_CLK low mclkl - PCM_CLK jitter Delay time from PCM_CLK high to PCM_SYNC t dmclksynch high t Delay time from ...

Page 78

PCM_SYNC PCM_CLK t PCM_OUT t PCM_IN Figure 10.26: PCM Master Timing Long Frame Sync t dmclksynch PCM_SYNC PCM_CLK PCM_OUT PCM_IN Figure 10.27: PCM Master Timing Short Frame Sync This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe dmclksynch f ...

Page 79

PCM Slave Timing Symbol Parameter f PCM clock frequency (Slave mode: input) sclk f PCM clock frequency (GCI mode) sclk t PCM_CLK low time sclkl t PCM_CLK high time sclkh t Hold time from PCM_CLK low to PCM_SYNC high ...

Page 80

PCM_CLK t hsclksynch PCM_SYNC t dpout PCM_OUT MSB (LSB) t supinsclkl PCM_IN MSB (LSB) Figure 10.28: PCM Slave Timing Long Frame Sync PCM_CLK t t susclksynch hsclksynch PCM_SYNC PCM_OUT PCM_IN Figure 10.29: PCM Slave Timing Short Frame Sync ...

Page 81

PCM_CLK and PCM_SYNC Generation BlueCore4-ROM has two methods of generating PCM_CLK and PCM_SYNC in master mode. The first is generating these signals by Direct Digital Synthesis (DDS) from BlueCore4-ROM internal 4MHz clock. Using this mode limits PCM_CLK to 128, ...

Page 82

PCM Configuration The PCM configuration is set using two PS Keys, PSKEY_PCM_CONFIG32 and PSKEY_PCM_LOW_JITTER_CONFIG. The following tables detail these PS Keys. PSKEY_PCM_CONFIG32. The default for this key is 0x00800000 i.e. first slot following sync is active, 13-bit linear voice ...

Page 83

Name CNT_LIMIT CNT_RATE SYNC_LIMIT Table 10.12: PSKEY_PCM_LOW_JITTER_CONFIG Description 10.8 I/O Parallel Ports Fifteen lines of programmable bi-directional input/outputs (I/O) are provided. PIO[11:8] and PIO[3:0] are powered from VDD_PIO. PIO[7:4] are powered from VDD_PADS. AIO [2:0] are powered from VDD_USB. PIO ...

Page 84

I C Interface PIO[8:6] can be used to form a Master I Therefore it is suited only to relatively slow functions such as driving a dot matrix liquid crystal display (LCD), keyboard scanner or EEPROM. Note: PIO[7:6] dual ...

Page 85

On reset and up to the time the PIO has been configured, PIO[2] will be tri-stated. Therefore, the developer must ensure that the circuitry connected to this pin is pulled via a 470kΩ resistor to the appropriate power rail. This ...

Page 86

Pin States on Reset Table 10.13 shows the pin states of BlueCore4-ROM on reset. Pin Name State: BlueCore4-ROM PIO[11:0] Input with weak pull-down PCM_OUT Tri-stated with weak pull-down PCM_IN Input with weak pull-down PCM_SYNC Input with weak pull-down PCM_CLK ...

Page 87

Power Supplies BlueCore4-ROM contains a 1.8V regulator which may be used to power the 1.8V supplies of the device. The device pin VREG_EN is used to enable and disable the regulator. Alternatively an external 1.8V voltage source may be ...

Page 88

Application Schematic Figure 11.1: Application Circuit for Radio Characteristics Specification with 6 x 6mm VFBGA Package This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe Production Information © Cambridge Silicon Radio Limited 2005 Application Schematic Page 88 of 102 ...

Page 89

Package Dimensions 12 6mm VFBGA 84-Ball Package Figure 12.1: BlueCore4-ROM 84-Ball VFBGA Package Dimensions This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe Production Information © Cambridge Silicon Radio Limited 2005 Package Dimensions Page 89 of 102 ...

Page 90

Solder Profiles The soldering profile depends on various parameters necessitating a set up for each application. The data here is given only for guidance on solder re-flow. The four zones are described in Table 13.1 Preheat Zone This zone ...

Page 91

Key features of the profile: ! Initial Ramp = 1-2.5°C/sec to 175°C±25°C equilibrium ! Equilibrium time = 60 to 180 seconds ! Ramp to Maximum temperature (250°C) = 3°C/sec max. ! Time above liquidus temperature (217°C): 45-90 seconds ! Device ...

Page 92

... Minimum Order Quantity 2kpcs Taped and Reeled This material is subject to CSR’s non-disclosure agreement BC41B143A-ds-001Pe Package Size Shipment Method 6 x 6mm x 1mm Tape and reel Production Information © Cambridge Silicon Radio Limited 2005 Ordering Information Order Number BC41B143A05-IRK-E4 Page 92 of 102 ...

Page 93

Tape and Reel Information Tape and reel is in accordance with EIA-481-2. 15.1 Tape Orientation and Dimensions The general orientation of the BGA in the tape is as shown in Figure 15.1. User Direction of Feed Figure 15.1: Tape ...

Page 94

As a detailed example, the diagram shown in Figure 15.2 outlines the dimensions of the tape used for 6 x 6mm x 1mm VFBGA devices: 2.0 •See Note 6 Ø1.5 MIN 0.30 ± 0.05 R0.3 MAX Bo Ko Section A-A ...

Page 95

Reel Information Reel dimensions (All dimensions in millimeters) Full Radius, See Note 1 D See Note 1 See Note 1 A See Note 1 Notes: 1. Drive spokes optional; if used , dimensions B and D shall apply. 2. ...

Page 96

Dry Pack Information The primary packed product is dry packed in accordance with Joint IPC / JEDEC J-STD-033. All materials used in dry packing conform to EIA-541 and EIA-583. Some illustrative views of reel dry packs are shown in ...

Page 97

Baking Conditions Devices may, if necessary, be re-baked at 125°C for 24 hours. If devices are still on the reel, which cannot withstand such high temperatures, they should be baked at 45°C for 192 hours at relative humidity less ...

Page 98

Contact Information CSR UK Cambridge Business Park Cowley Road Cambridge, CB4 0WZ United Kingdom Tel: +44 (0) 1223 692 000 Fax: +44 (0) 1223 692 001 e-mail: sales@csr.com CSR Korea 2nd floor, Hyo-Bong Building 1364-1, SeoCho-dong Seocho-gu Seoul 137-863 ...

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Document References Document: Specification of the Bluetooth System Specification of the Bluetooth System Universal Serial Bus Specification 2 Selection EEPROMS for Use with BlueCore RF Test Specification v2.0.E.2 This material is subject to CSR’s non-disclosure agreement ...

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Terms and Definitions 8DPSK 8 phase Differential Phase Shift Keying π/4 DQPSK pi/4 rotated Differential Quaternary Phase Shift Keying BlueCore™ Group term for CSR’s range of Bluetooth chips Bluetooth™ Set of technologies providing audio and data transfer over short-range radio ...

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LPF Low Pass Filter LSB Least-Significant Bit μ-law Audio Encoding Standard MCU MicroController Unit MMU Memory Management Unit MISO Master In Serial Out MOSI Master Out Slave In Mbps Mega bits per second OHCI Open Host Controller Interface PA Power ...

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Document History Date: Revision Reason for Change: Original publication of Advance Information Product Data Sheet (CSR reference: JUL 04 a BC41B143A-ds-001Pa) Corrected H1 and H2 ball assignments in section 2.2. (CSR reference: OCT 04 b BC41B143A-ds-001Pb) Corrected synthesiser information in ...

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