AT32UC3A364S Atmel Corporation, AT32UC3A364S Datasheet - Page 245
AT32UC3A364S
Manufacturer Part Number
AT32UC3A364S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A364S
Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 245 of 1012
- Download datasheet (16Mb)
17. Error Corrected Code Controller (ECCHRS)
17.1
17.2
32072G–11/2011
Features
Overview
Rev. 1.0.0.0
•
•
•
•
•
NAND Flash and SmartMedia
more invalid bits. Over the NAND Flash and SmartMedia
occur which can be detected and corrected by an Error Corrected Code (ECC).
The ECC Controller is a mechanism that encodes data in a manner that makes possible the
identification and correction of certain errors in data. The ECC controller is capable of single-bit
error correction and two-bit random detection when using the Hamming code (ECC-H) and up to
four symbols (a symbol is a 8-bit data) correction whatever the number of errors in symbol (1 to
8 bits of error) when using the Reed-Solomon code (ECC-RS).
When NAND Flash/SmartMedia
code (ECC-H) or more than four bits in error when using the Reed-Solomon code (ECC-RS), the
data cannot be corrected.
Hardware Error Corrected Code Generation with two methods :
Supports NAND Flash and SmartMedia
bit data path for ECC-RS
Supports NAND Flash and SmartMedia
(specified by software)
ECC_H supports :
ECC_RS supports :
– Hamming code detection and correction by software (ECC-H)
– Reed-Solomon code detection by hardware, correction by hardware or software (ECC-RS)
– One bit correction per page of 512,1024,2048, or 4096 bytes
– One bit correction per sector of 512 bytes of data for a page size of 512, 1024, 2048, or 4096
– One bit correction per sector of 256 bytes of data for a page size of 512, 1024, 2048, or 4096
– 4 errors correction per sector of 512 bytes of data for a page size of 512, 1024, 2048, and
bytes
bytes
4096 bytes with 8-bit data path
™
™
devices contain by default invalid blocks which have one or
have more than two erroneous bits when using the Hamming
™
™
devices with 8- or 16-bit data path for ECC-H, and with 8-
with page sizes of 528, 1056, 2112, and 4224 bytes
™
lifetime, additional invalid blocks may
245
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