AT32UC3A464 Atmel Corporation, AT32UC3A464 Datasheet - Page 641
AT32UC3A464
Manufacturer Part Number
AT32UC3A464
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A464
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Quantity
Price
Company:
Part Number:
AT32UC3A464-CIUT
Manufacturer:
ATMEL
Quantity:
180
Part Number:
AT32UC3A464-CIUT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3A464-U
Manufacturer:
XILINX
Quantity:
1
Company:
Part Number:
AT32UC3A464S-U
Manufacturer:
ATMEL
Quantity:
551
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 641 of 1012
- Download datasheet (16Mb)
32072G–11/2011
RXOUTI
FIFOCON
RXOUTI
FIFOCON
OUT
OUT
•Detailed description
(bank 0)
(bank 0)
DATA
DATA
Figure 26-19. Example of an OUT Endpoint with one Data Bank
Figure 26-20. Example of an OUT Endpoint with two Data Banks
The data is read, following the next flow:
If the endpoint uses several banks, the current one can be read while the following one is being
written by the host. Then, when the user clears FIFOCON, the following bank may already be
ready and RXOUTI is set immediately.
In Hi-Speed mode, the PING and NYET protocol is handled by the USBB. For single bank, a
NYET handshake is always sent to the host (on Bulk-out transaction) to indicate that the current
packet is acknowledged but there is no room for the next one. For double bank, the USBB
• When the bank is full, RXOUTI and FIFOCON are set, what triggers an EPnINT interrupt if
• The user acknowledges the interrupt by writing a one to RXOUTIC in order to clear RXOUTI.
• The user can read the byte count of the current bank from BYCT to know how many bytes to
• The user reads the data from the current bank by using the USBFIFOnDATA register (see
• The user frees the bank and switches to the next bank (if any) by clearing FIFOCON.
RXOUTE is one.
read, rather than polling RWALL.
”USB Pipe/Endpoint n FIFO Data Register (USBFIFOnDATA)” on page
expected data frame is read or the bank is empty (in which case RWALL is cleared and
BYCT reaches zero).
HW
ACK
ACK
HW
SW
read data from CPU
SW
BANK 0
OUT
NAK
read data from CPU
BANK 0
(bank 1)
DATA
SW
OUT
ACK
(bank 0)
DATA
HW
SW
HW
ACK
740), until all the
read data from CPU
read data from CPU
SW
SW
BANK 1
BANK 0
641
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