AT89C51ED2 Atmel Corporation, AT89C51ED2 Datasheet - Page 52

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AT89C51ED2

Manufacturer Part Number
AT89C51ED2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51ED2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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14.4.1
Figure 14-5. Internal Baud Rate
52
AT89C51RD2/ED2
Internal Baud Rate Generator (BRG)
Table 14-3.
When the internal Baud Rate Generator is used, the Baud Rates are determined by the BRG
overflow depending on the BRL reload value, the value of SPD bit (Speed Mode) in BDRCON
register and the value of the SMOD1 bit in PCON register.
Baud_Rate =
• The baud rate for UART is token by formula:
BRL = 256 -
(T2CON)
TCLK
X
X
X
0
1
0
1
0
1
F
Clk Periph
6
6
(1-SPD)
(1-SPD)
Baud Rate Selection Table UART
2
2
SMOD1
SMOD1
⋅ 32 ⋅ Baud_Rate
⋅ 32 ⋅ (256 -BRL)
(T2CON)
RCLK
÷ 6
X
X
X
0
0
1
1
0
1
⋅ F
⋅ F
PER
PER
BDRCON.1
SPD
0
1
(BDRCON)
TBCK
0
0
0
0
1
1
0
0
1
BDRCON.4
BRR
(BDRCON)
(8 bits)
(8 bits)
RBCK
BRG
BRL
0
0
0
0
0
0
1
1
1
Overflow
Clock Source
INT_BRG
INT_BRG
INT_BRG
UART Tx
Timer 1
Timer 2
Timer 1
Timer 2
Timer 1
Timer 2
÷ 2
SMOD1
PCON.7
0
1
4235K–8051–05/08
Clock Source
UART Rx
INT_BRG
INT_BRG
INT_BRG
Timer 1
Timer 1
Timer 2
Timer 2
Timer 1
Timer 2
INT_BRG

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