AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 28

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Physical memory
organisation
On-Chip Flash
memory
28
AT89C51RE2
Figure 9. Physical memory organisation
The AT89C51RE2 implements up to 128K bytes of on-chip program/code memory. Figure 9 and
Figure 10 shows the partitioning of internal and external program/code memory spaces accord-
ing to EA value.
The memory partitioning of the 8051 core microcontroller is typical a Harvard architecture where
program and data areas are held in separate memory areas. The program and data memory
areas use the same physical address range from 0000H-FFFFH and a 8 bit instruction
code/data format.
To access more than 64kBytes of code memory, without modifications of the MCU core, and
development tools, the bank switching method is used.
The internal program memory is expanded to 128kByte in the ´Expanded Configuration’, the
data memory remains in the ´Normal Configuration´. The program memory is split into four 32
kByte banks (named Bank 0-2). The MCU core still addresses up to 64kBytes where the upper
32Kbytes can be selected between 3 32K bytes bank of on-chip flash memory. The lower 32K
bank is used as common area for interrupt subroutines, bank switching and functions calls
between banks.
The AT89C51RE2 also implements an extra upper 32K bank (Bank3) that allows external code
execution.
Fuse Configuration Byte(1 byte)
Hardware Security (1 byte)
Extra Row FM0 (128 bytes)
Column Latches (128 bytes)
1FFFFh
00000h
FCB
HSB
Flash memory
128K bytes
user space
FM0
4K bytes
ROM
RM0
7663E–8051–10/08

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