AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 38

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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FSTA Register
38
AT89C51RE2
Table 24. FSTA Register
FSTA Register (S:D3h)
Flash Status Register
Reset Value= ‘R’xxx x000b
Where ‘R’ depends on the reset conditions: If RM0 is executed after Reset R=1, if FM0 is exe-
cuted after reset R=0
Bit Number
FMR
6-3
7
7
2
1
0
Mnemonic
FLOAD
FBUSY
FMR
FSE
Bit
6
-
-
Description
Flash Movc Redirection
When code is executed from RM0 (and only RM0), this bit allow the MOVC instruction to
be redirected to FM0.
Clear this bit to allow MOVC instruction to read FM0
Set this bit to allow MOVC instruction to read RM0
This bit can be written only from RM0 (on-chip ROM bootloader execution).
unused
Flash sequence error
Set by hardware when the flash activation sequencers FCON 5X and MOV FCON AX) is
not correct (See Error Report Section)
Clear by software or clear by hardware if the last activation sequence was correct
(previous error is canceled)
Flash Columns latch loaded
Set by hardware when the first data is loaded in the column latches.
Clear by hardware when the activation sequence succeeds (flash write success, or reset
column latch success)
Flash Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be changed by software.
5
-
4
-
3
-
FSE
2
FLOAD
1
7663E–8051–10/08
FBUSY
0

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