ATtiny167 Automotive Atmel Corporation, ATtiny167 Automotive Datasheet - Page 111

• Manufacturer Part Number: ATtiny167 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny167 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.2.1
7728G–AVR–06/10
Registers
Figure 12-1. 16-bit Timer/Counter1 Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Reg-
ister (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
on page
no CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals
are all visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually
masked with the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown
in the figure.
1. Refer to
112. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have
Timer/Counter1 pin placement and description.
Timer/Counter
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
Figure 1-2 on page
=
=
Direction
Count
Clear
TOP
5,
Control Logic
Table 9-6 on page
TCCRnB
=
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
(1)
0
ATtiny87/ATtiny167
81, and
TCCRnC
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
Table 9-3 on page 76
TOVn
(Int.Req.)
Clock Select
Generation
Generation
“Accessing 16-bit Registers”
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
( From Analog Comparator Ouput )
Edge
for
OCnAX
OCnBW
OCnBX
OCnAU
OCnAV
OCnAW
OCnBU
OCnBV
ICPn
Tn
111