ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 126
ATtiny25 Automotive
Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY25_AUTOMOTIVE.pdf
(7 pages)
3.ATTINY25_AUTOMOTIVE.pdf
(196 pages)
Specifications of ATtiny25 Automotive
Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY25_AUTOMOTIVE PDF datasheet #2
- ATTINY25_AUTOMOTIVE PDF datasheet #3
- Current page: 126 of 225
- Download datasheet (4Mb)
16.3.3
126
Atmel ATtiny24/44/84 [Preliminary]
SPI Slave Operation Example
The following code demonstrates how to use the USI module as a SPI Slave:
The code is size optimized using only eight instructions (+ ret). The code example assumes
that the DO is configured as output and USCK pin is configured as input in the DDR register.
The value stored in register r16 prior to the function being called is transferred to the master
device, and when the transfer is completed, the data received from the master is stored back
into the r16 register.
Note that the first two instructions are for initialization only and need only to be executed once.
These instructions set the three-wire mode and positive edge shift register clock. The loop is
repeated until the USI counter overflow flag is set.
ret
init:
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
out
in
ldi
out
out
ldi
out
in
sbrs
rjmp
in
ret
USICR,r17
r16,USIDR
r16,(1<<USIWM0)|(1<<USICS1)
USICR,r16
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
r16, USISR
r16, USIOIF
SlaveSPITransfer_loop
r16,USIDR
7701E–AVR–02/11
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