ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 82
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATtiny25 Automotive
Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY25_AUTOMOTIVE.pdf
(7 pages)
3.ATTINY25_AUTOMOTIVE.pdf
(196 pages)
Specifications of ATtiny25 Automotive
Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY25_AUTOMOTIVE PDF datasheet #2
- ATTINY25_AUTOMOTIVE PDF datasheet #3
- Current page: 82 of 225
- Download datasheet (4Mb)
13.8
82
Timer/Counter Timing Diagrams
Atmel ATtiny24/44/84 [Preliminary]
• OCR0A changes its value from MAX, as in
• The timer starts counting from a value higher than the one in OCR0A, and for that reason
The timer/counter is a synchronous design, and the timer clock (clkT0) is, therefore, shown as
a clock enable signal in the following figures. The figures include information on when interrupt
flags are set.
tion.The figure shows the count sequence close to the max value in all modes other than
phase correct PWM mode.
Figure 13-8. Timer/Counter Timing Diagram, no Prescaling
Figure 13-9 on page 82
Figure 13-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 13-10 on page 83
except CTC mode and PWM mode, where OCR0A is TOP.
is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To
ensure symmetry around BOTTOM the OCn value at MAX must correspond to the result of
an up-counting Compare Match.
misses the compare match and, hence, the OCn change that would have happened on the
way up.
TCNTn
TCNTn
(clk
(clk
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
Figure 13-8 on page 82
MAX - 1
MAX - 1
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0B in all modes and OCF0A in all modes
contains timing data for basic timer/counter opera-
MAX
MAX
Figure 13-7 on page
BOTTOM
BOTTOM
clk_I/O
81. When the OCR0A value
/8)
BOTTOM + 1
BOTTOM + 1
7701E–AVR–02/11
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