ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 15
ATtiny25 Automotive
Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY25_AUTOMOTIVE.pdf
(7 pages)
3.ATTINY25_AUTOMOTIVE.pdf
(196 pages)
Specifications of ATtiny25 Automotive
Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY25_AUTOMOTIVE PDF datasheet #2
- ATTINY25_AUTOMOTIVE PDF datasheet #3
- Current page: 15 of 225
- Download datasheet (4Mb)
6. Memories
6.1
6.2
7701E–AVR–02/11
In-System Re-programmable Flash Program Memory
SRAM Data Memory
This section describes the different memories in the Atmel
tecture has two main memory spaces, the data memory space and the program memory
space. In addition, the Atmel ATtiny24/44/84 features an EEPROM memory for data storage.
All three memory spaces are linear and regular.
The Atmel
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the flash mem-
ory is organized as 1024/2048/4096 x 16.
The flash memory has an endurance of at least 10,000 write/erase cycles. The Atmel
ATtiny24/44/84 program counter (PC) is 10/11/12 bits wide, thus addressing the
1024/2048/4096 program memory locations.
detailed description on Flash data serial downloading using the SPI pins.
Constant tables can be allocated within the entire Program memory address space (see the
LPM – Load Program memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
Timing” on page
Figure 6-1.
Figure 6-2 on page 16
The lower 160 data memory locations address the register file, the I/O memory, and the inter-
nal data SRAM. The first 32 locations address the register file, the next 64 locations the
standard I/O memory, and the last 128/256/512 locations address the internal data SRAM.
The five different addressing modes for the data memory are: direct, indirect with displace-
ment, indirect, indirect with pre-decrement, and indirect with post-increment. In the register
file, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing mode reaches the entire data space.
The indirect with displacement mode reaches 63 address locations starting from the base
address given by the Y- or Z-register.
®
ATtiny24/44/84 contains 2/4/8K bytes of on-chip, in-system, reprogrammable flash
Program Memory Map
12.
shows how the ATtiny24/44/84 SRAM Memory is organized.
Program Memory
Atmel ATtiny24/44/84 [Preliminary]
“Memory Programming” on page 163
0x03FF/0x07FF/0xFFF
0x0000
®
ATtiny24/44/84. The AVR
“Instruction Execution
contains a
®
archi-
15
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