ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 42

• Manufacturer Part Number: ATtiny85
• Manufacturer: Atmel Corporation

Specifications of ATtiny85

• Flash (kbytes): 8 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 3
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

8.2.1
8.2.2
42
ATtiny25/45/85
Power-on Reset
External Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
V
well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 8-2.
Figure 8-3.
An External Reset is generated by a low level on the RESET pin if enabled. Reset pulses longer
than the minimum pulse width (see
ate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a
reset. When the applied signal reaches the Reset Threshold Voltage – V
edge, the delay counter starts the MCU after the Time-out period – t
CC
is below the detection level. The POR circuit can be used to trigger the Start-up Reset, as
INTERNAL
INTERNAL
TIME-OUT
TIME-OUT
CC
RESET
RESET
RESET
RESET
V
V
decreases below the detection level.
CC
CC
“System and Reset Characteristics” on page
MCU Start-up, RESET Tied to V
MCU Start-up, RESET Extended Externally
V
V
V
POT
POT
RST
CC
t
TOUT
rise. The RESET signal is activated again, without any delay,
“System and Reset Characteristics” on page
CC
V
RST
t
TOUT
170. The POR is activated whenever
TOUT
– has expired.
RST
– on its positive
170) will gener-
2586N–AVR–04/11