ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 454
ATUC128L4U
Manufacturer Part Number
ATUC128L4U
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.ATUC128L4U.pdf
(960 pages)
4.ATUC128L4U.pdf
(92 pages)
Specifications of ATUC128L4U
Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATUC128L4U-U
Manufacturer:
ATMEL
Quantity:
3 006
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- ATUC128L4U PDF datasheet #3
- ATUC128L4U PDF datasheet #4
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20.6.5.11
20.6.5.12
Figure 20-26. Frame Slot Mode with Automatic Checksum
32142A–12/2011
TXRDY
Write
LINID
Write
THR
LINTC
Break
Checksum
Frame Slot Mode
Header
Synch
Table 20-8.
The last frame field is the checksum. It is configured by the Checksum Type (LINMR.CHKTYP),
and the Checksum Disable (LINMR.CHKDIS) bits. TXRDY will not be set after the last THR data
write if enabled. Writing a one to CHKDIS will disable the automatic checksum genera-
tion/checking, and the user may send/check this last byte manually, disguised as a normal data.
The checksum is an inverted 8-bit sum with carry, either:
A LIN master can be configured to use frame slots with a pre-defined minimum length. Writing a
one to the Frame Slot Mode Disable bit (LINMR.FSDIS) disables this mode. This mode will not
allow TXRDY to be set after a frame transfer until the entire frame slot duration has elapsed, in
effect preventing the master from sending a new header. The LIN Transfer Complete bit
(CSR.LINTC) will still be set after the checksum has been sent. Writing a one to CR.RSTST
clears LINTC.
The minimum frame slot size is determined by TFrame_Maximum, and calculated below (all val-
ues in bit periods):
• DLM=1: the response data length is defined by the Identifier bits according to the table below.
• over all data bytes, called a classic checksum. This is used for LIN 1.3 compliant slaves, and
• over all data bytes and the protected identifier, called an enhanced checksum. This is used
• THeader_Nominal = 34
automatically managed when CHKDIS=0, and CHKTYP=1.
for LIN 2.0 compliant slaves, and automatically managed when CHKDIS=0, and CHKTYP=0.
Data 1
IDCHR[5]
Protected
Identifier
Data3
0
0
1
1
Frame slot = TFrame_Maximum
Response Data Length if DLM = 1
Response
space
Data 2
Frame
Data 1
Data 3
IDCHR[4]
0
1
0
1
Data N
Response
Data N-1
ATUC64/128/256L3/4U
Response Data Length [bytes]
Data N
Frame Slot Mode
Checksum
2
2
4
8
Disabled
Frame Slot Mode
frame
space
Inter-
Enabled
454
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