ATxmega128D3 Atmel Corporation, ATxmega128D3 Datasheet - Page 306

• Manufacturer Part Number: ATxmega128D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega128D3

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8210B–AVR–04/10
17 SPI – Serial Peripheral Interface ......................................................... 193
18 USART ................................................................................................... 199
19 IRCOM - IR Communication Module .................................................. 220
20 ADC - Analog to Digital Converter ..................................................... 224
16.13
16.14
17.1
17.2
17.3
17.4
17.5
17.6
17.7
17.8
18.1
18.2
18.3
18.4
18.5
18.6
18.7
18.8
18.9
18.10
18.11
18.12
18.13
18.14
18.15
18.16
19.1
19.2
19.3
19.4
20.1
Register Summary - TWI Slave .....................................................................192
Interrupt Vector Summary .............................................................................192
Features ........................................................................................................193
Overview ........................................................................................................193
Master Mode ..................................................................................................194
Slave Mode ....................................................................................................194
Data Modes ...................................................................................................195
Register Description ......................................................................................196
Register Summary .........................................................................................198
SPI Interrupt vectors ......................................................................................198
Features ........................................................................................................199
Overview ........................................................................................................199
Clock Generation ...........................................................................................201
Frame Formats ..............................................................................................204
USART Initialization .......................................................................................205
Data Transmission - The USART Transmitter ...............................................205
Data Reception - The USART Receiver ........................................................206
Asynchronous Data Reception ......................................................................207
The Impact of Fractional Baud Rate Generation ...........................................210
USART in Master SPI Mode ..........................................................................211
USART SPI vs. SPI .......................................................................................211
Multi-processor Communication Mode ..........................................................212
IRCOM Mode of Operation ............................................................................213
Register Description ......................................................................................213
Register Summary .........................................................................................219
Interrupt Vector Summary .............................................................................219
Features ........................................................................................................220
Overview ........................................................................................................220
Registers Description ....................................................................................222
Register Summary .........................................................................................223
Features ........................................................................................................224
XMEGA D
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