M40800 Atmel Corporation, M40800 Datasheet - Page 159
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M40800
Manufacturer Part Number
M40800
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(21 pages)
3.M40800.pdf
(18 pages)
4.M40800.pdf
(153 pages)
Specifications of M40800
Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
40 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
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6.10
ARM DDI 0029G
Store multiple registers
Register
Single register
n registers (n>1)
The store multiple instruction proceeds very much as load multiple instruction, without
the final cycle. The abort handling is much more straightforward as there is no
wholesale overwriting of registers.
The cycle timings are listed in Table 6-13 where:
•
•
Ra is the first register specified
R• are the subsequent registers specified.
Cycle
1
2
1
2
•
n
n+1
Copyright © 1994-2001. All rights reserved.
Address
pc+2L
alu
pc+3L
pc+8
alu
alu+•
alu+•
alu+•
pc+12
Table 6-13 Store multiple registers instruction cycle operations
MAS[1:0]
i
2
i
2
2
2
2
nRW
0
1
0
1
1
1
1
Data
(pc+2L)
Ra
(pc+2L)
Ra
R•
R•
R•
nMREQ
0
0
0
0
0
0
0
Instruction Cycle Timings
SEQ
0
0
0
1
1
1
0
nOPC
0
1
0
1
1
1
1
6-17
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