M40800 Atmel Corporation, M40800 Datasheet - Page 228
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
M40800
Manufacturer Part Number
M40800
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(21 pages)
3.M40800.pdf
(18 pages)
4.M40800.pdf
(153 pages)
Specifications of M40800
Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
40 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
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Debug in Depth
B.5.2
B.5.3
B.5.4
B-10
SCAN_N (0010)
SAMPLE/PRELOAD (0011)
RESTART (0100)
The EXTEST instruction connects the selected scan chain between TDI and TDO.
When the instruction register is loaded with the EXTEST instruction, all of the scan
cells are placed in their test mode of operation:
•
•
The SCAN_N instruction connects the scan path select register between TDI and TDO:
•
•
•
•
The scan path select register is 4 bits long in this implementation, although no finite
length is specified. The least significant bit of the scan path select register is shifted
in/out first.
This instruction is included for production test only and must never be used on the scan
chains provided by the ARM7TDMI core. It can be used on user-added scan chains such
as boundary-scan chains.
The RESTART instruction restarts the processor on exit from debug state. The
RESTART instruction connects the bypass register between TDI and TDO. The TAP
controller behaves as if the BYPASS instruction had been loaded.
The processor exits debug state when the RUN-TEST-IDLE state is entered.
In the CAPTURE-DR state, inputs from the system logic and outputs from the
output scan cells to the system are captured by the scan cells.
In the SHIFT-DR state, the previously captured test data is shifted out of the scan
chain using TDO, while new test data is shifted in using the TDI input. This data
is applied immediately to the system logic and system pins.
In the CAPTURE-DR state, the fixed value 1000 is loaded into the register.
In the SHIFT-DR state, the ID number of the desired scan path is shifted into the
scan path select register.
In the UPDATE-DR state, the scan register of the selected scan chain is connected
between TDI and TDO and remains connected until a subsequent SCAN_N
instruction is issued.
On reset, scan chain 3 is selected by default.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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