M42800A Atmel Corporation, M42800A Datasheet - Page 123

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Signal Name Description
Note:
Timer Counter
Description
Counter
Clock Selection
1354D–ATARM–08/02
After a hardware reset, the Timer Counter block pins are controlled by the PIO Controller. They must be configured to be con-
trolled by the peripheral before being used.
TCLK0, TCLK1, TCLK2
Channel Signal
XC0, XC1, XC2
Block Signals
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
SYNC
TIOA
TIOB
INT
The three Timer Counter channels are independent and identical in operation. The reg-
isters for channel programming are listed in Table 17.
Each Timer Counter channel is organized around a 16-bit counter. The value of the
counter is incremented at each positive edge of the selected clock. When the counter
has reached the value 0xFFFF and passes to 0x0000, an overflow occurs and the bit
COVFS in TC_SR (Status Register) is set.
The current value of the counter is accessible in real-time by reading TC_CV. The
counter can be reset by a trigger. In this case, the counter value passes to 0x0000 on
the next valid edge of the selected clock.
At block level, input clock signals of each channel can either be connected to the exter-
nal inputs TCLK0, TCLK1 or TCLK2, or be connected to the configurable I/O signals
TIOA0, TIOA1 or TIOA2 for chaining by programming the TC_BMR (Block Mode).
Each channel can independently select an internal or external clock source for its
counter:
•
•
Internal clock signals: MCK/2, MCK/8, MCK/32,
MCK/128, MCK/1024
External clock signals: XC0, XC1 or XC2
Description
External Clock Inputs
Capture Mode: General Purpose Input
Waveform Mode: General Purpose Output
Capture Mode: General Purpose Input
Waveform Mode: General Purpose Input/Output
Interrupt Signal Output
Synchronization Input Signal
Description
External Clock Inputs
TIOA Signal for Channel 0
TIOB Signal for Channel 0
TIOA Signal for Channel 1
TIOB Signal for Channel 1
TIOA Signal for Channel 2
TIOB Signal for Channel 2
AT91X40 Series
123