SAM3N1A Atmel Corporation, SAM3N1A Datasheet - Page 477

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SAM3N1A

Manufacturer Part Number
SAM3N1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Figure 28-18. TWI Read Operation with Single Data Byte without Internal Address
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
Read Receive Holding Register
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
TWI_CR = START | STOP
Read ==> bit MREAD = 1
Set the Control register:
- Device slave address
- Transfer direction bit
Read Status register
Read status register
(Needed only once)
Start the transfer
- Master enable
Yes
TXCOMP = 1?
Yes
Set TWI clock
RXRDY = 1?
BEGIN
END
No
No
SAM3N
SAM3N
477
477

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