SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 61

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12.5.4
12.5.5
12.5.5.1
6062N–ATARM–3-Oct-11
Debug Unit
Embedded Trace Macrocell
Trace Port
RTCK is the Return Test Clock. Not an IEEE Standard 1149.1 signal added for a better clock
handling by emulators. From some ICE Interface probes, this return signal can be used to syn-
chronize the TCK clock and take not care about the given ratio between the ICE Interface clock
and system clock equal to 1/6th. This signal is only available in JTAG ICE Mode and not in
boundary scan mode.
The Debug Unit provides a two-pin (DXRD and TXRD) USART that can be used for several
debug and trace purposes and offers an ideal means for in-situ programming solutions and
debug monitor communication. Moreover, the association with two Peripheral DMA Controller
channels permits packet handling of these tasks with processor time reduced to a minimum.
The Debug Unit also manages the interrupt handling of the COMMTX and COMMRX signals
that come from the ICE and that trace the activity of the Debug Communication Channel.The
Debug Unit allows blockage of access to the system through the ICE interface.
A specific register, the Debug Unit Chip ID Register, gives information about the product version
and its internal configuration.
The AT91SAM9261 Debug Unit Chip ID value is 0x0197 03A0 on 32-bit width.
The AT91SAM9261 features an Embedded Trace Macrocell (ETM), which is closely connected
to the ARM926EJ-S Processor. The Embedded Trace is a standard Medium+ level implementa-
tion and contains the following resources:
The Embedded Trace Macrocell of the AT91SAM9261 works in half-rate clock mode and thus
integrates a clock divider. Thus the maximum frequency of all the trace port signals does not
exceed one half of the ARM926EJ-S clock speed.
The Embedded Trace Macrocell input and output resources are not used in the AT91SAM9261.
The Embedded Trace is a real-time trace module with the capability of tracing the ARM9EJ-S
instructions and data.
For further details on Embedded Trace Macrocell, see the ARM documents:
The Trace Port is made up of the following pins:
• Four pairs of address comparators
• Two data comparators
• Eight memory map decoder inputs
• Two 16-bit counters
• One 3-stage sequencer
• Four external inputs
• One external output
• One 45-byte FIFO
• ETM9 (Rev2p2) Technical Reference Manual (
• Embedded Trace Macrocell Specification (IHI 0014J)
DDI 0157F
)
AT91SAM9261
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