SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 1019
SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
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- SAM9261 PDF datasheet #3
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44.4.13
44.4.13.1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Physical Interface
RMII Transmit and Receive Operation
Depending on products, the Ethernet MAC is capable of interfacing to RMII or MII Interface. The
RMII bit in the EMAC_USRIO register controls the interface that is selected. When this bit is set,
the RMII interface is selected, else the MII interface is selected.
The MII and RMII interfaces are capable of both 10 Mb/s and 100 Mb/s data rates as described
in the IEEE 802.3u standard. The signals used by the RMII interface are described in
5.
Table 44-5.
The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It
uses 2 bits for transmit (ETX0 and ETX1) and two bits for receive (ERX0 and ERX1). There is a
Transmit Enable (ETXEN), a Receive Error (ERXER), a Carrier Sense (ECRS_DV), and a 50
MHz Reference Clock (ETXCK_EREFCK) for 100Mb/s data rate.
The RMII maps the signals in a more pin-efficient manner. The transmit and receive bits are con-
verted from a 4-bit parallel format to a 2-bit parallel scheme that is clocked at twice the rate. The
carrier sense and data valid signals are combined into the ECRSDV signal. This signal contains
information on carrier sense, FIFO status, and validity of the data. Transmit error bit (ETXER)
and collision detect (ECOL) are not used in RMII mode.
Pin Name
ETXCK_EREFCK
ECRS
ECOL
ERXDV
ERX0 - ERX3
ERXER
ERXCK
ETXEN
ETX0-ETX3
ETXER
Pin Configuration
ECRSDV: Carrier Sense/Data Valid
ERX0 - ERX1: 2-bit Receive Data
ETX0 - ETX1: 2-bit Transmit Data
EREFCK: Reference Clock
ETXEN: Transmit Enable
ERXER: Receive Error
RMII
SAM9G35
SAM9G35
Table 44-
1019
1019
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