SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 1139
SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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45.7.40
Name:
Address:
Access:
Reset:
• DFETCH: Transfer Descriptor Fetch Enable
0: Transfer Descriptor fetch is disabled.
1: Transfer Descriptor fetch is enabled.
• LFETCH: Lookup Table Fetch Enable
0: Lookup Table DMA fetch is disabled.
1: Lookup Tabled DMA fetch is enabled.
• DMAIEN: End of DMA Transfer Interrupt Enable
0: DMA transfer completed interrupt is enabled.
1: DMA transfer completed interrupt is disabled.
• DSCRIEN: Descriptor Loaded Interrupt Enable
0: Transfer descriptor loaded interrupt is enabled.
1: Transfer descriptor loaded interrupt is disabled.
• ADDIEN: Add Head Descriptor to Queue Interrupt Enable
0: Transfer descriptor added to queue interrupt is enabled.
1: Transfer descriptor added to queue interrupt is disabled.
• DONEIEN: End of List Interrupt Enable
0: End of list interrupt is disabled.
1: End of list interrupt is enabled.
1139
1139
31
23
15
–
–
–
7
–
SAM9G35
SAM9G35
Overlay 1 Layer Control Register
LCDC_OVRCTRL1
0xF8038124
Read-write
0x00000000
30
22
14
–
–
–
6
–
DONEIEN
29
21
13
–
–
–
5
ADDIEN
28
20
12
–
–
–
4
DSCRIEN
27
19
11
–
–
–
3
DMAIEN
26
18
10
–
–
–
2
LFETCH
25
17
–
–
9
–
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
DFETCH
24
16
–
–
8
–
0
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