SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 334

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SAM9X35

Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9X35

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 27-3. NAND Write Operation with Spare Encoding
27.4.1.2
Figure 27-4. NAND Write Operation
334
ECC computation enable signal
Write NAND operation with SPAREEN set to one
512 or 1024 bytes
SAM9X35
ECC computation enable signal
Write NAND operation with SPAREEN set to zero
MLC/SLC Write Operation with Spare Area Disabled
512 or 1024 bytes
Sector 0
Sector 0
When the SPAREEN field of PMECC_CFG is set to zero the spare area is not encoded with the
stream of data. This mode is entered by writing one to the DATA field of the PMECC_CTRL
register.
Sector 1
Sector 1
pagesize = n * sectorsize
pagesize = n * sectorsize
Sector 2
Sector 2
Sector 3
Sector 3
start_addr
ecc_area
11055B–ATARM–22-Sep-11
sparesize
Spare
end_addr

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