CS44800-CQZR Cirrus Logic Inc, CS44800-CQZR Datasheet - Page 62

• Manufacturer Part Number: CS44800-CQZR
• Description: IC AMP CTLR DGTL 8CH 64-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Amplifierr

Specifications of CS44800-CQZR

• Package / Case: 64-LQFP
• Applications: Automotive Audio
• Mounting Type: Surface Mount
• Product: Class-D
• Operating Supply Voltage: 2.5 V
• Supply Current: 150 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Supply Type: Digital
• Supply Voltage (max): 2.62 V
• Supply Voltage (min): 2.37 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1532 - BOARD EVAL FOR CS44800 PWM CTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

62
7.17
7.17.1 Release Rate (RRATE[7:0])
7.18
7.18.1 Channel Compensation Filter - Coarse Adjust (CHXX_CORS[5:0])
RESERVED
RRATE7
7
7
Limiter Release Rate (address 17h)
Chnl XX Load Compensation Filter - Coarse Adjust
(addresses 18h, 1Ah, 1Ch, 1Eh, 20h, 22h, 24h, 26h)
Default = 00100000
Function:
The limiter release rate is user selectable. The effective rate is a function of the SRC output sampling fre-
quency and the value in the Release Rate register. Rates are calculated using the function
RATE = (512/{value})/SRC Fs, where {value} is the decimal value in the Release Rate register and SRC
Fs is the output sample rate of the SRC which is determined by the PWM master clock frequency. SRC
Fs equals 384 kHz for 24.576 MHz based clocks and 421.875 kHz for 27.000 MHz based clocks.
Note: A value of zero in this register is not recommended, as it will induce erratic behavior of the limiter.
Use the LIM_EN bit to disable the limiter function (see
Default = 000000
Function:
The Channel Load Compensation Filter Coarse Adjustment settings control the amount of attenuation of
this single-pole filter and are used in conjunction with the Fine Adjustment bits to compensate for speaker
impedance load variations. Each PWM channel is controlled by an associated register. The coarse ad-
justment bits will attenuate the audio response curve according to the table below in 0.1 dB increments.
Filter setting values less than -4.0 dB will cause the PWM output to mute.
Binary Code
Binary Code
00000001
00010100
00101000
00000001
00010100
00101000
01011010
01011010
00111100
00111100
RESERVED
RRATE6
6
6
CHXX_CORS5
Decimal Value
Decimal Value
RRATE5
5
5
20
40
60
90
20
40
60
90
1
1
Table 11. Limiter Release Rate Settings
Table 10. Limiter Attack Rate Settings
CHXX_CORS4
RRATE4
Release Rate - 384 kHz
4
4
Attack Rate - 384 kHz
(µs per
(µs per
1333.333
66.667
33.333
22.222
14.815
83.33
4.167
2.083
1.389
0.926
CHXX_CORS3
1
1
RRATE3
/
/
8
8
dB)
dB)
3
3
Peak Limiter Control Register (address
CHXX_CORS2
RRATE2
Release Rate - 421.875 kHz
Attack Rate - 421.875 kHz
2
2
(µs per
(µs per
1213.630
75.852
60.681
30.341
20.227
13.485
3.793
1.896
1.264
0.843
CHXX_CORS1
1
1
/
RRATE1
/
8
8
dB)
dB)
1
1
CS44800
CHXX_CORS0
RRATE0
15h)).
DS632F1
0
0