TFA9882 NXP Semiconductors, TFA9882 Datasheet

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TFA9882

Manufacturer Part Number
TFA9882
Description
The TFA9882 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (WaferLevel Chip-Size Package) with a 400 µm pitch
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features and benefits
The TFA9882 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (Wafer
Level Chip-Size Package) with a 400 μm pitch.
It receives audio and control settings via an I
Operating mode transition is triggered when a clock signal is detected on the bit clock
input (BCK). Two devices can be combined to build a stereo application.
In stereo applications, the left or right I
select signal to, respectively, pin WSL or pin WSR. Mono mixing can be achieved by
connecting the word select signal to both WSL and WSR. Switching off the word select
signal selects Mute mode.
The device features low RF susceptibility because it has a digital input interface that is
insensitive to clock jitter. The second order closed loop architecture used in the TFA9882
provides excellent audio performance and high supply voltage ripple rejection.
TFA9882
3.4 W I2S input mono class-D audio amplifier
Rev. 2 — 20 April 2011
Small outline WLCSP9 package: 1.27 × 1.49 × 0.6 mm
Wide supply voltage range (fully operational from 2.5 V to 5.5 V)
High efficiency (90 %, 4 Ω/20 μH load) and low power dissipation
Quiescent power:
Output power:
Output noise voltage: 24 μV (A-weighted)
Signal-to-noise ratio: 103 dB (V
Fully short-circuit proof across load and to supply lines
Current limiting to avoid audio holes
Thermally protected
Undervoltage and overvoltage protection
High-pass filter for DC blocking
Simplified interface for audio and control settings
Left/right selection and mono mixing
Three gain settings: −3 dB, 0 dB and +3 dB
6.5 mW (V
7.65 mW (V
1.4 W into 4 Ω at 3.6 V supply (THD = 1 %)
2.7 W into 4 Ω at 5.0 V supply (THD = 1 %)
3.4 W into 4 Ω at 5.0 V supply (THD = 10 %)
DDD
DDD
= 1.8 V, V
= 1.8 V, V
DDP
DDP
DDP
= 3.6 V, 4 Ω/20 μH load, f
= 3.6 V, 4 Ω/20 μH load, f
2
S audio stream is selected by connecting the word
= 5 V, A-weighted)
2
S digital interface. The Power-down to
s
= 32 kHz)
s
= 48 kHz)
Product data sheet

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TFA9882 Summary of contents

Page 1

... WSL and WSR. Switching off the word select signal selects Mute mode. The device features low RF susceptibility because it has a digital input interface that is insensitive to clock jitter. The second order closed loop architecture used in the TFA9882 provides excellent audio performance and high supply voltage ripple rejection. 2. Features and benefits Small outline WLCSP9 package: 1.27 × ...

Page 2

... DDD L L Min Typ 2.5 - DDP 1.65 1.8 DDD - 1.5 - 1.1 - 0.1 - 1.25 - 1.1 - 2 100 100 100 100 TFA9882 μ [ kHz; i Max Unit 5.5 V 1.95 V 1.7 mA 1.25 mA μA 1 1.4 mA 1.2 mA μ © NXP B.V. 2011. All rights reserved ...

Page 3

... SELECTION A2 WSL WSR DATA A1 RECEIVER BCK C1 POWER DOWN CONTROL Block diagram of the TFA9882 All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 3.4 W I2S input mono class-D audio amplifier V DDP B2 TFA9882 HP PWM H-BRIDGE FILTER PROTECTION CIRCUITS: OTP ...

Page 4

... V ground if left channel is selected C3 O non-inverting output All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 3.4 W I2S input mono class-D audio amplifier TFA9882 bump index area 010aaa726 Transparent top view ...

Page 5

... Power-down mode is selected when there is no bit clock signal on the BCK input. Applying the bit clock signal will cause the TFA9882 to switch from Power-down mode to Operating mode (provided the word select signal is switched on). ...

Page 6

... MSB = Most Significant Bit Second Most Significant Bit 2 Fig format 8.3 Power-up/power-down sequence The TFA9882 power-up/power-down sequence is shown in Figure 6. External power supplies V switches to Operating mode. The TFA9882 should be switched to Power-down mode before the power supplies are disconnected or turned off. V DDD , V DDP BCK WS ...

Page 7

... DATA input during the power-up sequence (the first 12288 bit clock cycles). The word select signal (WS) must be switched off during this interval. control setting bytes, the TFA9882 activates the appropriate control setting (see the third column of 0xAA is received or the V ...

Page 8

... NXP Semiconductors 8.4.2 Clip control TFA9882 clip control is off by default. Clip control can be turned on via control setting 0xD2 (see is at maximum with clip control off. 8.4.3 Gain selection Signal conversion from digital audio to PWM modulated audio out is independent of supply voltages V level is just below the clipping point at a supply voltage of 3 −6 dBFS (peak) input. ...

Page 9

... Equation f – ( high 3dB f high(−3dB) enabled. 8.6 PWM frequency The TFA9882 translates the I The PWM switching frequency is linearly proportional to the sampling frequency, and is defined PWM The PWM switching frequency equals 384 kHz when the sampling frequency is 48 kHz. TFA9882 Product data sheet ...

Page 10

... Bandwidth The TFA9882 output spectrum has a sigma-delta converter characteristic. illustrates the output power spectrum of the TFA9882 when it is receiving an I stream without audio content. The quantization noise is shaped above the band of interest. The band of interest (bandwidth) is determined by the high corner frequency where the noise is increasing ...

Page 11

... P(ovp) while the amplifier outputs are switching (the amplifier is O(ocp) , but the amplifier will not switch off completely (thus preventing O(ocp) All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 © NXP B.V. 2011. All rights reserved ...

Page 12

... V DDP on pin V DDD pins BCK and DATA pins OUTA and OUTB pins WSL and WSR All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 3.4 W I2S input mono class-D audio amplifier A1, C1 ESD B3 010aaa714 B1, B2 ESD B3 010aaa715 ...

Page 13

... In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V electrostatic discharge voltage ESD [1] Measurements taken on the TFA9882 in a HVSON10 package (engineering samples) due to handling restrictions with WLCSP9. 11. Thermal characteristics Table 13. Thermal characteristics Symbol Parameter R thermal resistance from junction to ambient th(j-a) Ψ ...

Page 14

... Mute mode kHz kHz s Power-down mode BCK = WS = DATA = 0 V All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 3.4 W I2S input mono class-D audio amplifier = 20 μH [1] [ kHz kHz Min ...

Page 15

... W I2S input mono class-D audio amplifier Ω μ [1] [ kHz kHz Min - - = 8 Ω μ Ω μ 217 2 3 Ω [2] - [2] - [2] - TFA9882 ° amb Typ Max Unit 0.02 0.1 % μ 103 - 2 ...

Page 16

... All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 3.4 W I2S input mono class-D audio amplifier Ω μ [1] [ kHz kHz Min 010aaa732 TFA9882 ° amb Typ Max Unit - 48 kHz 64f - © ...

Page 17

... Standby and Operating modes. 13.1.2 Emissions Since the TFA9882 is a class-D amplifier with digitally switched outputs in a BTL configuration, it can potentially generate emissions due to the steep edges on the amplifier outputs. External components can be used to suppress these emissions. ...

Page 18

... All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 3.4 W I2S input mono class-D audio amplifier battery B2 OUTA C3 OUTB A3 CVDDP 4.7 μF battery B2 OUTA C3 OUTB A3 CVDDP 4.7 μF TFA9882 left speaker Ω Ω right speaker Ω Ω 010aaa733 © NXP B.V. 2011. All rights reserved ...

Page 19

... Hz Ω μ DDP L L TFA9882 001aam636 (W) o 001aam635 (W) o © NXP B.V. 2011. All rights reserved ...

Page 20

... μ DDP −1 (1) (2) −2 − 100 Ω μ DDP L L TFA9882 001aam640 (Hz) i 001aam639 (Hz) i © NXP B.V. 2011. All rights reserved ...

Page 21

... V = 3.6 V DDP ( DDP = 4 Ω μ 200 mV (RMS ripple TFA9882 001aam642 (4) (3) (2) ( (Hz 100 mW o 001aam644 (Hz) ripple © NXP B.V. 2011. All rights reserved ...

Page 22

... THD Ω μH (2) THD Ω μH (3) THD Ω μH (4) THD 100 Hz, clip control on i TFA9882 001aam650 (1) (2) (3) ( (V) DDP © NXP B.V. 2011. All rights reserved ...

Page 23

... kHz, DPSA 100 η (1) (%) 0.5 1.0 1.5 2.0 2.5 ( 3.6 V DDP ( DDP = 4 Ω μ kHz, DPSA TFA9882 001aam645 (2) ( (W) o 001aam646 (2) 3.0 3.5 P (W) o © NXP B.V. 2011. All rights reserved ...

Page 24

... B A bump A1 1 index area Dimensions Unit max 0.6 0.22 0.38 0.28 nom 0.20 0.36 0.26 mm min 0.18 0.34 0.24 Outline version IEC TFA9882UK Fig 21. Package outline TFA9882UK (WLCSP9) TFA9882 Product data sheet Ø Ø 0.5 scale ...

Page 25

... Package reflow temperature (°C) 3 Volume (mm ) < 350 260 260 250 Figure 22. All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 3.4 W I2S input mono class-D audio amplifier Figure 22) than a PbSn process, thus Table 17. 350 to 2000 > 2000 260 260 250 245 ...

Page 26

... MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 3.4 W I2S input mono class-D audio amplifier peak temperature time 001aac844 © NXP B.V. 2011. All rights reserved. ...

Page 27

... AN10365 “Surface mount reflow soldering description”. 15.3.4 Cleaning Cleaning can be done after reflow soldering. TFA9882 Product data sheet 3.4 W I2S input mono class-D audio amplifier All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 © NXP B.V. 2011. All rights reserved ...

Page 28

... NXP Semiconductors 16. Revision history Table 18. Revision history Document ID Release date TFA9882 v.2 20110420 • Modifications: Data sheet status changed to ‘Product data sheet’ TFA9882 v.1 20110331 TFA9882 Product data sheet 3.4 W I2S input mono class-D audio amplifier Data sheet status Product data sheet Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — ...

Page 29

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 © NXP B.V. 2011. All rights reserved ...

Page 30

... NXP Semiconductors’ product specifications. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 April 2011 TFA9882 © NXP B.V. 2011. All rights reserved ...

Page 31

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TFA9882 All rights reserved. Date of release: 20 April 2011 Document identifier: TFA9882 ...

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