LPC2194 NXP Semiconductors, LPC2194 Datasheet - Page 15

• Manufacturer Part Number: LPC2194
• Description: The LPC2194 is based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation andembedded trace support, together with 256 kB of embedded high-speed flash memory
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2194
Product data sheet
6.10.2 UART features available in LPC2194/01 only
6.11.1 Features
6.11 I
Compared to previous LPC2000 microcontrollers, UARTs in LPC2194/01 introduce a
fractional baud rate generator for both UARTs, enabling these microcontrollers to achieve
standard baud rates such as 115200 Bd with any crystal frequency above 2 MHz. In
addition, auto-CTS/RTS flow-control functions are fully implemented in hardware.
The I
line (SCL), and a serial data line (SDA). Each device is recognized by a unique address
and can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with
the capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
The I
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C-bus serial I/O controller
Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
UART1 is equipped with standard modem interface signals. This module also
provides full support for hardware flow control (auto-CTS/RTS).
Fractional baud rate generator enables standard baud rates such as 115200 Bd to be
achieved with any crystal frequency above 2 MHz.
Auto-bauding.
Auto-CTS/RTS flow-control fully implemented in hardware.
Standard I
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
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C-bus is a bidirectional bus for inter-IC control using only two wires: a serial clock
C-bus implemented in LPC2194 supports a bit rate up to 400 kbit/s (Fast I
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C-bus may be used for test and diagnostic purposes.
2
C-bus compliant interface.
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 14 June 2011
Single-chip 16/32-bit microcontroller
2
C-bus is a multi-master bus; it can be
LPC2194
© NXP B.V. 2011. All rights reserved.
2
C-bus).
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