LH7A400_N NXP Semiconductors, LH7A400_N Datasheet - Page 6
LH7A400_N
Manufacturer Part Number
LH7A400_N
Description
The LH7A400, powered by an ARM922T, is a completeSystem-on-Chip with a high level of integration tosatisfy a wide range of requirements and expectations
Manufacturer
NXP Semiconductors
Datasheet
1.LH7A400_N.pdf
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LH7A400
6
BGA
R11
N12
R13
M12
M15
N13
H11
H15
H13
G15
G11
G12
D16
H10
D14
P12
T11
T13
P16
P15
P14
K11
K10
P13
K12
F15
F12
E14
F10
A16
A14
B13
PIN
L12
L16
L15
L14
J15
J13
J10
D3
H6
D4
E4
C2
J6
LFBGA
M10
R15
M13
M12
G16
G14
G12
P12
R13
N11
R14
N14
P14
P16
N15
N16
K11
K14
H16
H14
H11
F15
E15
D16
F12
E13
D14
E12
B16
D12
A16
PIN
L11
L13
L14
L16
J15
J12
J10
D1
D2
G9
E4
E2
F2
J5
VDDA
VSSA
nPOR
nURESET
WAKEUP
nPWRFL
nEXTPWR
XTALIN
XTALOUT
XTAL32IN
XTAL32OUT
CLKEN
PGMCLK
nCS0
nCS1
nCS2
nCS3/
nMMSPICS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
SIGNAL
Analog Power for PLL
Analog Ground for PLL
Power On Reset
User Reset; should be pulled HIGH for normal or
JTAG operation.
Wake Up
Power Fail Signal
External Power
14.7456 MHz Crystal Oscillator pins. An external
clock source can be connected to XTALIN leaving
XTALOUT open.
32.768 kHz Real Time Clock Crystal Oscillator
pins. An external clock source can be connected to
XTAL32IN leaving XTAL32OUT open.
External Osc Clock Enable Output
Programmable Clock (14.7456 MHz MAX.)
Async Memory Chip Select 0
Async Memory Chip Select 1
Async Memory Chip Select 2
• Async Memory Chip Select 3
• MultiMediaCard SPI Mode Chip Select
Data Bus
Table 3. Functional Pin List (Cont’d)
DESCRIPTION
Rev. 01 — 16 July 2007
NXP Semiconductors
RESET
STATE
Output
HIGH:
HIGH
HIGH
HIGH
nCS3
HIGH
Input
Input
Input
Input
Input
Input
Input
LOW
LOW
LOW
LOW or HIGH
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
STANDBY
STATE
HIGH
LOW
LOW
32-Bit System-on-Chip
Preliminary data sheet
OUTPUT
DRIVE
12 mA
12 mA
12 mA
12 mA
12 mA
8 mA
8 mA
I/O NOTES
I/O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
3
3
3
3
3
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