LPC2921_23_25 NXP Semiconductors, LPC2921_23_25 Datasheet - Page 18

• Manufacturer Part Number: LPC2921_23_25
• Description: The LPC2921/2923/2925 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_23_25_3
Product data sheet
6.8.2 Flash layout
With dual buffering, a secondary buffer line is used, the output of the flash being
considered as the primary buffer. On a primary buffer, hit data can be copied to the
secondary buffer line, which allows the flash to start a speculative read of the next flash
word.
Both buffer lines are invalidated after:
The modes of operation are listed in
Table 9.
The ARM processor can program the flash for ISP (In-System Programming) through the
flash memory controller. Note that the flash always has to be programmed by ‘flash words’
of 128 bits (four 32-bit AHB bus words, hence 16 bytes).
The flash memory is organized into eight ‘small’ sectors of 8 kB each and up to 11 ‘large’
sectors of 64 kB each. The number of large sectors depends on the device type. A sector
must be erased before data can be written to it. The flash memory also has sector-wise
protection. Writing occurs per page which consists of 4096 bits (32 flash words). A small
sector contains 16 pages; a large sector contains 128 pages.
Table 10
Table 10.
Synchronous timing
No buffer line
Single buffer line
Asynchronous timing
No buffer line
Single buffer line
Dual buffer line, single
speculative
Dual buffer line, always
speculative
Flash memory
sector number
11
12
13
14
15
•
•
•
•
Initialization
Configuration-register access
Data-latch reading
Index-sector reading
gives an overview of the flash-sector base addresses.
Flash read modes
Flash sector overview
All information provided in this document is subject to legal disclaimers.
Sector size (kB)
8
8
8
8
8
Rev. 03 — 14 April 2010
for single (non-linear) reads; one flash-word read per word read
default mode of operation; most recently read flash word is kept until
another flash word is required
one flash-word read per word read
most recently read flash word is kept until another flash word is
required
on a buffer miss a flash read is done, followed by at most one
speculative read; optimized for execution of code with small loops
(less than eight words) from flash
most recently used flash word is copied into second buffer line; next
flash-word read is started; highest performance for linear reads
Flash memory
address
0x2000 0000
0x2000 2000
0x2000 4000
0x2000 6000
0x2000 8000
Table
ARM9 microcontroller with CAN, LIN, and USB
9.
LPC2921/2923/2925
LPC2921
yes
yes
yes
yes
yes
LPC2923 LPC2925
yes
yes
yes
yes
yes
© NXP B.V. 2010. All rights reserved.
yes
yes
yes
yes
yes
18 of 84