PSMN4R5-30YLC NXP Semiconductors, PSMN4R5-30YLC Datasheet - Page 10

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN4R5-30YLC

Manufacturer Part Number
PSMN4R5-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN4R5-30YLC
Product data sheet
Fig 16. Input, output and reverse transfer capacitances
Fig 18. Reverse recovery timing definition
(pF)
C
10
10
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
-1
1
10
(A)
I
D
0
N-channel 30 V 4.8 mΩ logic level MOSFET in LFPAK using NextPower
V
003a a e 988
All information provided in this document is subject to legal disclaimers.
C
C
C
DS
is s
os s
rs s
(V)
10
2
Rev. 3 — 5 July 2011
t
a
Fig 17. Source current as a function of source-drain
t
rr
(A)
I
S
80
60
40
20
t
0
b
voltage; typical values
0
I
RM
003a a f 444
0.25 I
t (s )
R M
T
PSMN4R5-30YLC
j
= 150 C
0.4
0.8
T
j
© NXP B.V. 2011. All rights reserved.
= 25 C
V
003a a e 991
S D
(V)
1.2
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