PSMN4R5-30YLC NXP Semiconductors, PSMN4R5-30YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN4R5-30YLC

Manufacturer Part Number
PSMN4R5-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN4R5-30YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
(m)
R
DS on
16
12
8
4
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
Q
10
GS1
2.6
I
Q
D
GS
Q
GS2
20
Q
G(tot)
Q
GD
30
N-channel 30 V 4.8 mΩ logic level MOSFET in LFPAK using NextPower
V
4.5
GS
2.8
All information provided in this document is subject to legal disclaimers.
003a a e 986
003aaa508
(V) =10V
I
D
(A)
3.0
3.5
40
Rev. 3 — 5 July 2011
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
(V)
GS
a
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
6V
0
PSMN4R5-30YLC
10
V
DS
60
24V
= 15V
20
120
© NXP B.V. 2011. All rights reserved.
Q
4.5V
V
003a a e 990
GS
G
003a a f398
T
j
(nC)
= 10V
( C)
180
30
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