STM32F217IG STMicroelectronics, STM32F217IG Datasheet - Page 161

• Manufacturer Part Number: STM32F217IG
• Description: High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto
• Manufacturer: STMicroelectronics

Specifications of STM32F217IG

• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII

STM32F215xx, STM32F217xx
Table 91.
25-Nov-2010
Date
Document revision history (continued)
Revision
3
Added WLCSP66 (64+2) package. Added note 1 related to LQFP176
on cover page.
Update I/Os in
Updated
Added case of BOR inactivation using IRROFF on WLCSP devices in
Section 2.2.15: Power supply
Reworked
modes. Added
Modified V
added note related to the FSMC_NL pin.
Renamed BYPASS-REG REGOFF, and add IRROFF pin.
Changed V
Updated maximum HSE crystal frequency to 26 MHz.
USART4/5 renamed UART4/5. USART4 pins renamed UART4 in
Table 5: STM32F21x pin and ball
features for UART4/5 in
Section 5.2: Absolute maximum
maximum values and note for non-five-volt tolerant pins in
Voltage
notes in
Updated V
conditions.
Added
Limitations depending on the operating power supply
added
Renamed Brownout Low, medium and High reset thresholds,
Renamed V
Embedded reset and power control block
Changed f
Added
Changed f
characteristics.
Changed f
and updated jitter parameters in
characteristics.
Section 5.3.16: I/O port
Table 42: I/O static
Added
Updated R
FS DC electrical
Updated V
Updated
Removed Ethernet and USB2 for 64-pin devices in
applications versus package for STM32F2xxx
Added
FS connection with external PHY” figure, updated
Figure
Doc ID 17050 Rev 6
Figure 19: Number of wait states versus fCPU and VDD
85, and
Note 2
Figure 33: ACCLSI versus
Note 1
A.2: Application example with regulator
characteristics. Updated I
Table 8: Current
Table 6: Multi-AHB
Table 67: Embedded internal reference
LSI
OSC_IN
PLL_IN
DD_3
DDA
REF+
Section 2.2.16: Voltage regulator
PD
SS_SA
BORL
typical value in
and R
and updated Maximum CPU frequency in
below
minimum value in
Section :
Section 2.2.19: VBAT
Figure 87
pin in
minimum value in
/V
maximum value in
characteristics.
maximum value in
to V
BORM
characteristics.
PU
Table 43: Output voltage
Table 5: STM32F21x pin and ball
SS
parameter description in
characteristics: updated V
, and V
Table 4: USART feature
/V
Features.
characteristics.
to add STULPI01B.
BORH
matrix.
Table 29: LSI oscillator
supervisor.
Changes
DD_SA
, V
ratings: Updated V
Table 31: PLLI2S (audio PLL)
Table 10: General operating
INJ(PIN)
definitions. Updated LIN and IrDA
temperature.
Table 62: ADC
BOR1
Table 30: Main PLL
Table 26: HSE 4-26 MHz oscillator
operation.
pin reserved for future use.
/V
maximum values and related
characteristics.
BOR2
to clarify regulator off
characteristics.
microcontrollers.
/V
OFF, removed “OTG
Table 53: USB OTG
comparison.
BOR3
voltage.
characteristics.
IH
Figure
IN
Table 90: Main
Revision history
characteristics.
and V
range; and
minimum and
in
definitions, and
characteristics,
Table 11:
Table 15:
84,
Table 7:
IL
in
range.
161/168