STM32F217IG STMicroelectronics, STM32F217IG Datasheet - Page 19
STM32F217IG
Manufacturer Part Number
STM32F217IG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW crypto
Manufacturer
STMicroelectronics
Datasheet
1.STM32F215ZG.pdf
(168 pages)
Specifications of STM32F217IG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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STM32F215xx, STM32F217xx
2.2.8
2.2.9
DMA controller (DMA)
The devices feature two general-purpose dual-port DMAs (DMA1 and DMA2) with 8
streams each. They are able to manage memory-to-memory, peripheral-to-memory and
memory-to-peripheral transfers. They share some centralized FIFOs for APB/AHB
peripherals, support burst transfer and are designed to provide the maximum peripheral
bandwidth (AHB/APB).
The two DMA controllers support circular buffer management, so that no specific code is
needed when the controller reaches the end of the buffer. The two DMA controllers also
have a double buffering feature, which automates the use and switching of two memory
buffers without requiring any special code.
Each stream is connected to dedicated hardware DMA requests, with support for software
trigger on each stream. Configuration is made by software and transfer sizes between
source and destination are independent.
The DMA can be used with the main peripherals:
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Flexible static memory controller (FSMC)
The FSMC is embedded in all STM32F21x devices. It has four Chip Select outputs
supporting the following modes: PC Card/Compact Flash, SRAM, PSRAM, NOR Flash and
NAND Flash.
Functionality overview:
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LCD parallel interface
The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It
supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to
specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-
effective graphic applications using LCD modules with embedded controllers or high
performance solutions using external controllers with dedicated acceleration.
SPI and I
I
USART and UART
General-purpose, basic and advanced-control timers TIMx
DAC
SDIO
Cryptographic acceleration
Camera interface (DCMI)
ADC.
Write FIFO
Code execution from external memory except for NAND Flash and PC Card
Maximum frequency (f
2
C
2
S
HCLK
Doc ID 17050 Rev 6
) for external access is 60 MHz
Description
19/168
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