STM32F051C4 STMicroelectronics, STM32F051C4 Datasheet - Page 17

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STM32F051C4

Manufacturer Part Number
STM32F051C4
Description
Entry-level ARM Cortex-M0 MCU with 16 Kbytes Flash, 48 MHz CPU, motor control and CEC functions
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F051C4

Voltage Range
2.0 V to 3.6 V
Conversion Range
0 to 3.6V
Systick Timer
24-bit downcounter

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STM32F051x
3.12.4
3.12.5
3.12.6
3.13
Independent window watchdog (IWWDG)
The independent window watchdog is based on an 8-bit prescaler and 12-bit downcounter
with user-defined refresh window. It is clocked from an independent 40 kHz internal RC and
as it operates independently from the main clock, it can operate in Stop and Standby
modes. It can be used either as a watchdog to reset the device when a problem occurs, or
as a free running timer for application timeout management. It is hardware or software
configurable through the option bytes. The counter can be frozen in debug mode.
System window watchdog (WWDG)
The system window watchdog is based on a 7-bit downcounter that can be set as free
running. It can be used as a watchdog to reset the device when a problem occurs. It is
clocked from the APB clock (PCLK). It has an early warning interrupt capability and the
counter can be frozen in debug mode.
SysTick timer
This timer is dedicated to real-time operating systems, but could also be used as a standard
down counter. It features:
Inter-integrated circuit interfaces (I
Up to two I
can support Standard mode (up to 100 kbit/s) or Fast mode (up to 400 kbit/s) and I2C1
supports also Fast Mode Plus (up to 1 Mbit/s) with 20 mA output drive.
Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (2
addresses, 1 with configurable mask). They also include programmable analog and digital
noise filters.
Table 4.
Pulse width of
suppressed spikes
Benefits
Drawbacks
A 24-bit down counter
Autoreload capability
Maskable system interrupt generation when the counter reaches 0.
Programmable clock source (HCLK or HCLK/8)
2
C interfaces (I2C1 and I2C2) can operate in multimaster or slave modes. Both
Comparison of I2C analog and digital filters
≥ 50 ns
Available in Stop mode
Variations depending on
temperature, voltage, process
Doc ID 018746 Rev 2
Analog filter
2
C)
Programmable length from 1 to 15
I2C peripheral clocks
1. Extra filtering capability vs.
standard requirements.
2. Stable length
Disabled when Wakeup from Stop
mode is enabled
Digital filter
Functional overview
17/22

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