STM32F415ZG STMicroelectronics, STM32F415ZG Datasheet - Page 93
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STM32F415ZG
Manufacturer Part Number
STM32F415ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet
1.STM32F415ZG.pdf
(168 pages)
Specifications of STM32F415ZG
Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Cryptographic Acceleration
hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1), and HMAC
Rtc
subsecond accuracy, hardware calendar
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F415ZGT6
Manufacturer:
VISHAY
Quantity:
5 000
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STM32F415xx, STM32F417xx
5.3.11
Table 34.
1. Guaranteed by design, not tested in production.
MODEPER * INCSTEP
Symbol
f
md
Mod
PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences (see
SSCG parameters constraint
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
f
As an example:
If f
equation 1:
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
f
With a modulation depth (md) = ±2 % (4 % peak to peak), and f
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
As a result:
The error in modulation depth is consequently: 2.0 - 1.99954 = 0.00046%.
PLL_IN
VCO_OUT
PLL_IN
INCSTEP
and f
= 1 MHz, and f
must be expressed in MHz.
md
md
INCSTEP
Mod
quantized
quantized
must be expressed in Hz.
=
Table 40: EMI
round
%
%
=
MOD
=
[
round
=
(
Peak modulation depth
(
Modulation frequency
MODEPER
(
2
MODEPER
(
MODEPER INCSTEP
25
15
= 1 kHz, the modulation depth (MODEPER) is given by
Doc ID 022063 Rev 2
[
–
×
Parameter
(
(
1
1258
2
)
characteristics). It is available only on the main PLL.
15
×
–
2
×
1
×
=
) md
×
100
=
240
×
round 10
round f
×
)
⁄
5
(
×
100
)
[
[
f
⁄
VCO_OUT
(
PLL_IN
(
6
2
×
⁄
×
15
(
5
4
100
×
–
×
⁄
1
25
(
10
)
) 240
4
×
⁄
×
)
3
(
×
]
5
100 5
)
)
0.25
f
=
Min
]
Mod
⁄
-
-
(
=
1258md(quantitazed)%
(
)
×
2
25
)
VCO_OUT
=
15
]
Electrical characteristics
×
1.99954%(peak)
–
MODEPER
1
Typ
) f
-
-
-
×
VCO_OUT
= 240 (in MHz):
Max
2
15
10
2
)
−1
]
(1)
)
Unit
KHz
93/168
%
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