ST72325S4 STMicroelectronics, ST72325S4 Datasheet - Page 17

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ST72325S4

Manufacturer Part Number
ST72325S4
Description
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72325S4

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
3 REGISTER & MEMORY MAP
As shown in
dressing 64K bytes of memories and I/O registers.
The available memory locations consist of 128
bytes of register locations, up to 2Kbytes of RAM
and up to 60Kbytes of user program memory. The
RAM space includes up to 256 bytes for the stack
from 0100h to 01FFh.
The highest address bytes contain the user reset
and interrupt vectors.
Figure 6. Memory Map
FFFFh
FFDFh
FFE0h
0FFFh
0080h
0000h
007Fh
087Fh
0880h
1000h
Interrupt & Reset Vectors
Figure
(2048, 1536, 1024,
(60,48, 32 or 16K)
Program Memory
HW Registers
(see
(see
or 512 Bytes)
Reserved
RAM
6, the MCU is capable of ad-
Table
Table
4)
9)
or 047Fh
or 067Fh
or 087Fh
00FFh
01FFh
0080h
0100h
0200h
027Fh
16-bit Addressing
Short Addressing
RAM (zero page)
256 Bytes Stack
IMPORTANT: Memory locations marked as “Re-
served” must never be accessed. Accessing a re-
seved area can have unpredictable effects on the
device.
Related Documentation
AN 985: Executing Code in ST7 RAM
RAM
1000h
4000h
FFFFh
8000h
C000h
60 KBytes
48 KBytes
16 KBytes
32 KBytes
ST72325xx
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