ST72262G1 STMicroelectronics, ST72262G1 Datasheet - Page 32
ST72262G1
Manufacturer Part Number
ST72262G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet
1.ST72262G2.pdf
(172 pages)
Specifications of ST72262G1
4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
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ST72260Gx, ST72262Gx, ST72264Gx
INTERRUPTS (Cont’d)
Table 5. Interrupt Mapping
Note 1. Configurable by option byte.
Table 6. Nested Interrupts Register Map and Reset Values
32/172
Address
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
001Ch
001Dh
001Eh
001Fh
(Hex.)
TIMER A
TIMER B
Source
RESET
Block
TRAP
MCC
AVD
SCI
SPI
ei0
ei1
I
ISPR0
Reset Value
ISPR1
Reset Value
ISPR2
Reset Value
ISPR3
Reset Value
2
C
Register
Label
Reset
Software Interrupt
External Interrupt Port A7..0 (C5..0
External Interrupt Port B7..0 (C5..0
Not used
SPI Peripheral Interrupts
TIMER A Peripheral Interrupts
Time base interrupt
TIMER B Peripheral Interrupts
Auxiliary Voltage Detector interrupt
Not used
Not used
SCI Peripheral Interrupt
Not Used
Not Used
I
2
C Peripheral Interrupt
I1_11
I1_3
I1_7
7
1
1
1
1
AVD
SPI
I
2
C
Description
I0_11
I0_3
I0_7
6
1
1
1
1
I1_10
I1_2
I1_6
5
1
1
1
1
Not Used
TIMERB
1
1
SCI
)
)
I0_10
I0_2
I0_6
4
1
1
1
1
Register
MCCSR
I2CSRx
SPISR
SICSR
SCISR
Label
TASR
TBSR
N/A
I1_13
I1_1
I1_5
I1_9
3
1
1
1
1
Not Used
Not Used
MCC
Priority
Highest
Lowest
Priority
Priority
EI1
Order
I0_13
I0_1
I0_5
I0_9
2
1
1
1
1
HALT
from
Exit
yes
yes
yes
yes
no
no
no
no
no
I1_12
I1_0
I1_4
I1_8
1
1
1
1
1
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Not Used
Not Used
TIMERA
Address
EI0
Vector
I0_12
I0_0
I0_4
I0_8
0
1
1
1
1
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