ST72321AR9-Auto STMicroelectronics, ST72321AR9-Auto Datasheet - Page 105

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ST72321AR9-Auto

Manufacturer Part Number
ST72321AR9-Auto
Description
8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR9-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
ST72321xx-Auto
13.3.4
Output compare
In this section, the index, i, may be 1 or 2 because there are two output compare functions in
the 16-bit timer.
This function can be used to control an output waveform or indicate when a period of time
has elapsed.
When a match is found between the Output Compare register and the free running counter,
the output compare function:
Two 16-bit registers Output Compare Register 1 (OC1R) and Output Compare Register 2
(OC2R) contain the value to be compared to the counter register each timer clock cycle.
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OC
Timing resolution is one count of the free running counter: (f
Procedure
To use the output compare function, select the following in the CR2 register:
And select the following in the CR1 register:
When a match is found between OCRi register and CR register:
The OC
the following formula:
Where:
Assigns pins with a programmable value if the OCiE bit is set
Sets a flag in the status register
Generates an interrupt if enabled
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCFi bit is set.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is
cleared in the CC register (CC).
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits; see
Timer clock
CPU
i
R register value required for a specific timing application can be calculated using
OCiR
= Output compare period (in seconds)
= CPU clock frequency (in hertz)
selection)
i
R value to 8000h.
Doc ID 13829 Rev 1
 OCiR =
MS byte
OCiHR
Table 61: Timer clock
t
PRESC
*
f
CPU
CPU/CC[1:0]
selection).
).
LS byte
OCiLR
Table 61:
16-bit timer
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