ST72321AR9-Auto STMicroelectronics, ST72321AR9-Auto Datasheet - Page 110

• Manufacturer Part Number: ST72321AR9-Auto
• Description: 8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

16-bit timer
Note:
13.3.7
110/243
Figure 53. Pulse width modulation mode timing example with 2 output compare
On timers with only one Output Compare register, a fixed frequency PWM signal can be
generated using the output compare and the counter overflow to define the pulse length.
Pulse width modulation mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so this functionality cannot be used when PWM mode is activated.
In PWM mode, double buffering is implemented on the output compare registers. Any new
values written in the OC1R and OC2R registers are taken into account only at the end of the
PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).
Procedure
To use pulse width modulation mode:
1.
2.
3.
4.
Load the OC2R register with the value corresponding to the period of the signal using
the appropriate formula below according to the timer clock source used.
Load the OC1R register with the value corresponding to the period of the pulse if
OLVL1 = 0 and OLVL2 = 1 using the appropriate formula below according to the timer
clock source used.
Select the following in the CR1 register:
–
–
Select the following in the CR2 register:
–
–
–
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC2R register.
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0]) (see
Note: OC1R = 2ED0h, OC2R = 34E2, OLVL1 = 0, OLVL2 = 1
functions
COUNTER 34E2
OCMP1
compare2
FFFC FFFD FFFE
Doc ID 13829 Rev 1
OLVL2
Table 61: Timer clock
compare1
2ED0 2ED1 2ED2
OLVL1
selection).
compare2
34E2
ST72321xx-Auto
OLVL2
FFFC