ST72334N4 STMicroelectronics, ST72334N4 Datasheet - Page 17

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ST72334N4

Manufacturer Part Number
ST72334N4
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72334N4

Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
5 FLASH PROGRAM MEMORY
5.1 INTRODUCTION
FLASH devices have a single voltage non-volatile
FLASH memory that may be programmed in-situ
(or plugged in a programming tool) on a byte-by-
byte basis.
5.2 MAIN FEATURES
5.3 STRUCTURAL ORGANISATION
The FLASH program memory is organised in a
single 8-bit wide memory block which can be used
for storing both code and data constants.
The FLASH program memory is mapped in the up-
per part of the ST7 addressing space and includes
the reset and interrupt user vector area .
5.4 IN-SITU PROGRAMMING (ISP) MODE
The FLASH program memory can be programmed
using Remote ISP mode. This ISP mode allows
the contents of the ST7 program memory to be up-
dated using a standard ST7 programming tools af-
ter the device is mounted on the application board.
This feature can be implemented with a minimum
number of added components and board area im-
pact.
An example Remote ISP hardware interface to the
standard ST7 programming tool is described be-
low. For more details on ISP programming, refer to
the ST7 Programming Specification.
Remote ISP Overview
The Remote ISP mode is initiated by a specific se-
quence on the dedicated ISPSEL pin.
The Remote ISP is performed in three steps:
Remote ISP hardware configuration
In Remote ISP mode, the ST7 has to be supplied
with power (V
cillator and application crystal circuit for example).
– Selection of the RAM execution mode
– Download of Remote ISP code in RAM
– Execution of Remote ISP code in RAM to pro-
Remote In-Situ Programming (ISP) mode
Up to 16 bytes programmed in the same cycle
MTP memory (Multiple Time Programmable)
Read-out memory protection against piracy
gram the user program into the FLASH
DD
and V
SS
) and a clock signal (os-
This mode needs five signals (plus the V
if necessary) to be connected to the programming
tool. This signals are:
If any of these pins are used for other purposes on
the application, a serial resistor has to be imple-
mented to avoid a conflict if the other device forces
the signal level.
Figure 6
standard ST7 programming tool. For more details
on the pin locations, refer to the device pinout de-
scription.
Figure 6. Typical Remote ISP Interface
5.5 MEMORY READ-OUT PROTECTION
The read-out protection is enabled through an op-
tion bit.
For FLASH devices, when this option is selected,
the program and data stored in the FLASH memo-
ry are protected against read-out piracy (including
a re-write protection). When this protection option
is removed the entire FLASH program memory is
first automatically erased. However, the E
data memory (when available) can be protected
only with ROM devices.
– RESET: device reset
– V
– ISPCLK: ISP output serial clock pin
– ISPDATA: ISP input serial data pin
– ISPSEL: Remote ISP mode selection. This pin
C
L0
must be connected to V
board through a pull-down resistor.
SS
XTAL
ST72334J/N, ST72314J/N, ST72124J
ST7
: device ground power supply
shows a typical hardware interface to a
C
L1
ISPDATA
ISPCLK
ISPSEL
RESET
TO PROGRAMMING TOOL
HE10 CONNECTOR TYPE
V
SS
SS
on the application
10K
APPLICATION
DD
2
47K
PROM
signal
17/153
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