DS2408 Maxim, DS2408 Datasheet

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DS2408

Manufacturer Part Number
DS2408
Description
The DS2408 is an 8-channel, programmable I/O 1-Wire® chip
Manufacturer
Maxim
Datasheet

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1-Wire is a registered trademark of Maxim Integrated Products, Inc.
FEATURES
DESCRIPTION
The DS2408 is an 8-channel, programmable I/O 1-Wire chip. PIO outputs are configured as open-drain and
provide an on resistance of 100Ω max. A robust PIO channel-access communication protocol ensures that PIO
output-setting changes occur error-free. A data-valid strobe output can be used to latch PIO logic states into
external circuitry such as a D/A converter (DAC) or microcontroller data bus.
DS2408 operation is controlled over the single-conductor 1-Wire bus. Device communication follows the
standard Dallas Semiconductor 1-Wire protocol. Each DS2408 has its own unalterable and unique 64-bit
ROM registration number that is factory lasered into the chip. The registration number guarantees unique
identification and is used to address the device in a multidrop 1-Wire net environment. Multiple DS2408
devices can reside on a common 1-Wire bus and can operate independently of each other. The DS2408 also
supports 1-Wire conditional search capability based on PIO conditions or power-on-reset activity; the
conditions to cause participation in the conditional search are programmable. The DS2408 has an optional V
supply connection. When an external supply is absent, device power is supplied parasitically from the 1-Wire
bus. When an external supply is present, PIO states are maintained in the absence of the 1-Wire bus power
source. The RSTZ signal is configurable to serve as either a hard-wired reset for the PIO output or as a strobe
for external circuitry to indicate that a PIO write or PIO read has completed.
www.maxim-ic.com
19-5702; 12/10
Eight Channels of Programmable I/O with
Open-Drain Outputs
On-Resistance of PIO Pulldown Transistor
100Ω (max); Off-Resistance 10MΩ (typ)
Individual Activity Latches Capture
Asynchronous State Changes at PIO Inputs for
Interrogation by the Bus Master
Data-Strobe Output to Synchronize PIO Logic
States to External Read/Write Circuitry
Built-in Multidrop Controller Ensures
Compatibility with Other Dallas Semiconductor
1-Wire
Supports 1-Wire Conditional Search Command
with Response Controlled by Programmable
PIO Conditions
Unique Factory-Lasered 64-Bit Registration
Number Ensures Error-Free Device Selection
and Absolute Part Identity
Communicates to Host with a Single Digital
Signal at 15.3kbps or 100kbps using 1-Wire
Protocol
Operating Range: 2.8V to 5.25V, -40°C to
+85°C
®
Net Products
1 of 39
1-Wire 8-Channel Addressable Switch
PIN CONFIGURATION
ORDERING INFORMATION
+Denotes a lead(Pb)-free package.
T&R = Tape and reel.
DS2408S+
DS2408S+T&R
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
150-mil SO
PIN-PACKAGE
16 SO
16 SO
DS2408
CC

Related parts for DS2408

DS2408 Summary of contents

Page 1

... Multiple DS2408 devices can reside on a common 1-Wire bus and can operate independently of each other. The DS2408 also supports 1-Wire conditional search capability based on PIO conditions or power-on-reset activity; the conditions to cause participation in the conditional search are programmable ...

Page 2

... PUP 2.2kΩ Overdrive speed PUP 2.2kΩ Overdrive speed, Directly prior to reset pulse; R PUP = 2.2kΩ Standard speed Overdrive speed Standard speed Overdrive speed MIN TYP MAX 2.8 5.25 3.3 5.25 1 2.2 1200 1 0.5 3.2 0.30 0.8 3.4 0.16 0.73 0 0 DS2408 UNITS V µA kΩ pF µ µs µs µs ...

Page 3

... RL + δ 1.8 RL 0.30 - 0.8 5.25 X 0.4 1 100 1 5 DS2408 UNITS µs µs µs µs µs µs µs µs µs µs µ µA ns µs ...

Page 4

... If t PWMIN(max 5µs after power has been applied, PUP and V maximum specifications TH TL < PUP whenever the master drives the line after V has been reached REH TH < the pulse will be rejected. If PWMIN(min) > PWMIN(max) DS2408 the ...

Page 5

... DESCRIPTION ). When configured as STRB RST , an output strobe will occur after a PIO write STRB . DS2408 VALUES STANDARD OVERDRIVE SPEED SPEED MIN MAX MIN 1) 65µs (undef.) 10µs 660µs 720µs 53µs 15µs 60µ ...

Page 6

... OVERVIEW Figure 1 shows the relationships between the major function blocks of the DS2408. The device has two main data components: 1) 64-bit lasered ROM, and 2) 64-bit register page of control and status registers. Figure 2 shows the hierarchical structure of the 1-Wire protocol. The bus master must first provide one of the eight ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Conditional Search ROM, 5) Skip ROM, 6) Overdrive-Skip ROM, 7) Overdrive-Match ROM Resume ...

Page 7

... MSB 64-BIT LASERED ROM Each DS2408 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. See Figure 3 for details. The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4 ...

Page 8

... X REGISTER ACCESS The registers needed to operate the DS2408 are organized as a Register Page, as shown in Figure 5. All registers are volatile, i. e., they lose their state when the device is powered down. PIO, Conditional Search, and Control/Status registers are read/written using the device level Read PIO Registers and Write Conditional Search Register commands described in subsequent sections and Figure 8 of this document ...

Page 9

... This register is not affected if the device reinitializes itself after an ESD PL5 PL4 PL3 PL2 AL5 AL4 AL3 AL2 input successful execution of the Reset Activity Latches RST STRB See the Channel-access commands STRB b1 b0 PL1 PL0 STRB b1 b0 AL1 AL0 DS2408 . ...

Page 10

... This register is read/write. Each bit is associated with the respective PIO channel as shown in Figure 7. This register is cleared to 00h by a power-on reset PIO ACTIVITY LATCH Q Q DATA S D CLOCK PIO OUTPUT LATCH ROS STRB SM5 SM4 SM3 SM2 "1" CHANNEL I/O PIN D R EDGE DETECTOR Q Q RSTZ PIN b1 b0 SM1 SM0 DS2408 ...

Page 11

... This register is read/write. Each bit is associated with the respective PIO channel as shown in Figure 7. This register is cleared to 00h by a power-on reset. Figure 7. Conditional Search Logic PLS CHANNEL 0 AL0 P0 CHANNEL 7 AL7 SP5 SP4 SP3 SP2 SP0 SM0 INPUT FROM CHANNELS (NOT SHOWN) SP7 SM7 SP1 SP0 CT DS2408 CSR ...

Page 12

... As long as this bit is 1 the device will always respond to a conditional search. b7 For V powered operation the V CC source ≥ PUP 0: V pin is grounded -powered operation PLS DEFINITION pin needs to be tied to a voltage CC DS2408 ...

Page 13

... To read the three PIO state and latch register bytes, the target address should be 0088h. Returned data for a target address <0088h is undefined. Y Address = 88h? N DS2408 sets Register Address = (T15:T0) Bus Master RX Data Byte from Register Address DS2408 Incre- Master ments Address TX Reset? ...

Page 14

... Figure 8-2. CONTROL FUNCTIONS FLOW CHART DS2408 ...

Page 15

... Figure 8-3. CONTROL FUNCTIONS FLOW CHART DS2408 ...

Page 16

... Control Functions Flow Chart (Figure 8) describes the protocols necessary for accessing the PIO channels and the special function registers of the DS2408. The communication between the master and the DS2408 takes place either at standard speed (default overdrive speed (OD = 1). If not explicitly set into the overdrive mode, the device operates at standard speed. ...

Page 17

... Figure 10. If this bit the transition begins after t case the transition begins at the end of the time slot, when the V the master about the successful change of the PIO status, the DS2408 transmits a confirmation byte with , a strobe signal will be generated during the transmission of the ...

Page 18

... Wire reset to end the command. Write Conditional Search Register [CCh] This command is used to tell the DS2408 the conditions that need to be met for the device to respond to a Conditional Search command, to define the function of the RSTZ pin and to clear the power-on reset flag. ...

Page 19

... With the DS2408 the bus must be left low for no longer than 13µs at overdrive speed to ensure that none of the slave devices on the 1-Wire bus performs a reset. The DS2408 communicates properly when used in conjunction with a DS2480B 1-Wire driver and serial port adapters that are based on this driver chip ...

Page 20

... All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS2408 is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section. ...

Page 21

... The Overdrive Match ROM command followed by a 64-bit ROM sequence transmitted at overdrive speed allows the bus master to address a specific DS2408 on a multidrop bus and to simultaneously set it in overdrive mode. Only the DS2408 that exactly matches the 64-bit ROM sequence will respond to the subsequent control function command ...

Page 22

... Flow Chart (Figure From Figure 12 Figure 12 ECh N Cond. Search Command Condition Met? Y DS2408 TX Bit 0 DS2408 TX Bit 0 Master TX Bit 0 N Bit 0 Match DS2408 TX Bit 1 DS2408 TX Bit 1 Master TX Bit 1 N Bit 1 Match DS2408 TX Bit 63 DS2408 TX Bit 63 ...

Page 23

... A5h 3Ch N Resume Overdrive Command? Skip ROM Master TX Reset ? Y Master TX Reset ? 69h N Overdrive Match ROM Master TX Bit 0 Y Bit 0 Match Master TX Bit 1 Bit 1 Match? Y Master TX Bit 63 Bit 63 Match DS2408 ...

Page 24

... Figure 13 shows the initialization sequence required to begin any communication with the DS2408. A Reset Pulse followed by a Presence Pulse indicates the DS2408 is ready to receive data, given the correct ROM and control function command. If the bus master uses slew-rate control on the falling edge, it must ...

Page 25

... Read/Write Time Slots Data communication with the DS2408 takes place in time slots, which carry a single bit each. Write time slots transport data from bus master to slave. Read time slots transfer data from slave to master. The definitions of the write and read time slots are illustrated in Figure 14. ...

Page 26

... DS2408 starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, the DS2408 does not hold the data line low at all, and the voltage starts rising as soon δ ...

Page 27

... ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS2408 to determine if the ROM data has been received error free. The equivalent polynomial function of this CRC is X ...

Page 28

... STAGE STAGE STAGE STAGE STAGE Figure 17. DS2408 AS SLAVE INTERFACE FOR MICROCONTROLLER VCC VCC GND 1W The data direction (upload/download) is determined by application-specific data protocol POLYNOMIAL = STAGE STAGE STAGE ...

Page 29

... Figure 18. DS2408 AS SLAVE INTERFACE FOR INTELLIGENT DISPLAY VCC 5VDC GND Figure 19. DS2408 AS MICROCONTROLLER PORT EXPANDER MICROCONTROLLER WITH FEW I/O PINS VCC 1 VCC GND 2 OSC1/ OSC2/ CLR/P3 P2/CK PIC12C508 24 I/O LINES OR 3 BYTE-WIDE BUSES FROM A SINGLE PIN DS9503 ...

Page 30

... Figure 20. DS2408 AS µC-OPERATED KEYBOARD SCANNER VCC VCC GND POR Circuit Figure 21. DS2408 AS PARASITE-POWERED PUSH-BUTTON SENSOR VCC 0.1U Parasite Power 1W GND 10U VCC GND 10 RSTZ DS2408 VCC VCC ...

Page 31

... Figure 22. DS2408 AS MULTIPURPOSE SENSOR/ACTUATOR 47U VCC VCC 1W 3 GND VCC GND DS2408 10kΩ RSTZ VCC BSS-84 1N4004 SWITCHES OR PUSH- BUTTONS VCC 4mA 1kΩ ISOLATED ...

Page 32

... Command-Specific 1-Wire Communication Protocol—Color Codes Master to slave Slave to master Read PIO Registers (Success) RST PD Select RPR Read PIO Registers (Fail Address) RST PD Select RPR Channel-Access Read (Cannot Fail) RST PD Select CAR DESCRIPTION TA <data> CRC16\ FF loop TA FF loop <32 samples>, CRC16\ loop DS2408 ...

Page 33

... Figure 17. They show how to write to the PIO with readback for verification or for receiving an immediate response (example 1) and how to read from the PIO in an endless loop (example 2). The third example assumes a network of multiple DS2408s where each of the devices is connected to 8 pushbuttons Figure 21. ...

Page 34

... Task: Read from the PIO in an endless loop. This task is broken into the following steps: 1) Configure RSTZ as output. STRB 2) Verify configuration setting. 3) Read from the PIO. With only a single DS2408 connected to the bus master, the communication is as follows: MASTER MODE Step ...

Page 35

... CRC16. See Application Note 114, section "UNIVERSAL DATA PACKET" for details. Example 3 Task: Detect the specific DS2408 where the button was pressed and identify the pin to which the pushbutton is connected. This task is broken into the following steps: 1) Configure the conditional search and verify configuration setting. ...

Page 36

... Source is Activity Latch ⇒ PLS = 1 Term is OR ⇒ RSTZ = inactive (input) ⇒ ROS = 0 Clear Power-On Reset Latch ⇒ PORL = 0 The resulting setup data for the Control/Status Register is 01h. For each DS2408 in the application, perform the following initialization: MASTER MODE Step ...

Page 37

... After all DS2408s are initialized, perform the search process below as an endless loop: MASTER MODE Step Step (— (—) Note 1: For a full description of the Search Algorithm see Application Note 187. DATA (LSB FIRST) ...

Page 38

... DS2408 ROM Code> Power-up State When the DS2408 powers up, the state of the I/O pins indeterminate. This behavior may not be acceptable for some applications. To ensure that power up in the "off" state necessary to have a suitable power-on-reset circuit, such as the DS1811 supervisor IC connected to the RSTZ pin. ...

Page 39

... Maxim is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor. DESCRIPTION . W0L spec in the EC table. W1L specifications without notice at any time. © 2010 Maxim Integrated Products DS2408 PAGES CHANGED — 25, 38 ...

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