DS2408 Maxim, DS2408 Datasheet - Page 17

• Manufacturer Part Number: DS2408
• Description: The DS2408 is an 8-channel, programmable I/O 1-Wire® chip
• Manufacturer: Maxim

The status of all eight PIO channels is sampled at the same time. The first sampling occurs during the last
(most significant) bit of the command code F5h. While the master receives the MSB of the PIO status
(i.e., the status of pin P7) the next sampling occurs and so on until the master has received 31 PIO
samples. Next, the master receives the inverted CRC16 of the command byte and 32 PIO samples (first
pass) or the CRC of 32 PIO samples (subsequent passes). While the last (most significant) bit of the CRC
is transmitted the next PIO sampling takes place. The delay between the beginning of the time slot and
the sampling point is independent of the bit value being transmitted and the data direction (see Figure 9).
If the RSTZ pin is configured as
first two (least significant) bits of PIO data. The strobe can signal a FIFO or a microcontroller to apply
the next data byte at the PIO for the master to read through the 1-Wire line.
Channel-Access Write [5Ah]
The Channel-Access Write command is the only way to write to the PIO output-latch state register
(address 0089h), which controls the open-drain output transistors of the PIO channels. In an endless loop
this command first writes new data to the PIO and then reads back the PIO status. The implicit read-after-
write can be used by the master for status verification or for a fast communication with a microcontroller
that is connected to the port pins and RSTZ for synchronization. A Channel-Access Write can be termi-
nated at any time with a 1-Wire Reset.
Figure 10. CHANNEL-ACCESS WRITE TIMING
Note:
Both examples assume that the RSTZ pin is configured as
input (default), the RSTZ pin needs to be tied high (to V
function properly. Leaving the pin unconnected will force the output transistors of the PIO channels to the
"off" state and the PIO output latches will all read "1". See Figure 6 for a schematic of the logic.
After the command code the master transmits a byte that determines the new state of the PIO output
transistors. The first (least significant) bit is associated to P0. To switch the output transistor off (non-
conducting) the corresponding bit value is 1. To switch the transistor on that bit needs to be 0. This way
the data byte transmitted as the new PIO output state arrives in its true form at the PIO pins. To protect
the transmission against data errors, the master has to repeat the new PIO byte in its inverted form. Only
if the transmission was successful will the PIO status change. The actual transition at the PIO to the new
state occurs during the last (most significant) bit of the inverted new PIO data byte and depends on the
polarity of that bit, as shown in Figure 10. If this bit is a 1, the transition begins after t
case of a 0, the transition begins at the end of the time slot, when the V
the master about the successful change of the PIO status, the DS2408 transmits a confirmation byte with
IO (1-Wire)
STRB\
PIO
Case #1 - MS Bit of new PIO state is 0
Example - Old State = 39h, New state = 72h
MS 2 bits of inverted
new-state byte (8Dh)
39h
t
SLS
STRB
72h
t
SPD
LS 2 bits of confir-
mation byte (AAh)
, a strobe signal will be generated during the transmission of the
t
SPD
17 of 39
Case #2 - MS Bit of new PIO state is 1
Example - Old State = 72h, New state = 93h
MS 2 bits of inverted
new-state byte (6Ch)
CC
STRB
or V
72h
output. If RSTZ is configured as
PUP
) for the Channel-Access Write to
TH
threshold is crossed. To inform
V
TH
t
LS 2 bits of confir-
mation byte (AAh)
SPD
93h
SLS
is expired; in
t
SPD
DS2408
RST